From: Conor Dooley <conor@kernel.org>
To: shravan chippa <shravan.chippa@microchip.com>
Cc: green.wan@sifive.com, vkoul@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, conor+dt@kernel.org,
dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
nagasuresh.relli@microchip.com, praveen.kumar@microchip.com
Subject: Re: [PATCH v3 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma
Date: Wed, 25 Oct 2023 15:12:20 +0100 [thread overview]
Message-ID: <20231025-pang-unstuffed-4d8bf48baf21@spud> (raw)
In-Reply-To: <20231025102251.3369472-5-shravan.chippa@microchip.com>
[-- Attachment #1: Type: text/plain, Size: 1074 bytes --]
On Wed, Oct 25, 2023 at 03:52:51PM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Add specific compatible for PolarFire SoC for The SiFive PDMA driver
>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
> arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
> index 104504352e99..f43486e9a090 100644
> --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
> @@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
> };
>
> pdma: dma-controller@3000000 {
> - compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
> + compatible = "microchip,mpfs-pdma", "sifive,pdma0";
> reg = <0x0 0x3000000 0x0 0x8000>;
> interrupt-parent = <&plic>;
> interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
> --
> 2.34.1
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
prev parent reply other threads:[~2023-10-25 14:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-25 10:22 [PATCH v3 0/4] dma: sf-pdma: various sf-pdma updates for the mpfs platform shravan chippa
2023-10-25 10:22 ` [PATCH v3 1/4] dmaengine: sf-pdma: Support of_dma_controller_register() shravan chippa
2023-10-25 10:22 ` [PATCH v3 2/4] dt-bindings: dma: sf-pdma: add new compatible name shravan chippa
2023-10-25 10:22 ` [PATCH v3 3/4] dmaengine: sf-pdma: add mpfs-pdma " shravan chippa
2023-10-25 13:01 ` Emil Renner Berthing
2023-10-25 10:22 ` [PATCH v3 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma shravan chippa
2023-10-25 14:12 ` Conor Dooley [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231025-pang-unstuffed-4d8bf48baf21@spud \
--to=conor@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmaengine@vger.kernel.org \
--cc=green.wan@sifive.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=nagasuresh.relli@microchip.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=praveen.kumar@microchip.com \
--cc=robh+dt@kernel.org \
--cc=shravan.chippa@microchip.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).