From: Conor Dooley <conor@kernel.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org, apatel@ventanamicro.com,
palmer@dabbelt.com, devicetree@vger.kernel.org,
ajones@ventanamicro.com, Rob Herring <robh@kernel.org>,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH] dt-bindings: riscv: Document cbop-block-size
Date: Sun, 29 Oct 2023 14:53:41 +0000 [thread overview]
Message-ID: <20231029-kitten-provider-1602fa805c35@spud> (raw)
In-Reply-To: <20231029123500.739409-1-dbarboza@ventanamicro.com>
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Yo,
On Sun, Oct 29, 2023 at 09:35:00AM -0300, Daniel Henrique Barboza wrote:
> Following the examples of cbom-block-size and cboz-block-size,
> cbop-block-size is the cache size of Zicbop (cbo.prefetch) operations.
> The most common case is to have all cache block sizes to be the same
> size (e.g. profiles such as rva22u64 mandates a 64 bytes size for all
> cache operations), but there's no specification requirement for that,
> and an implementation can have different cache sizes for each operation.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Firstly, odd CC list. Please CC the output of get_maintainer.pl in the
future.
IIRC, I mentioned defining this to Drew when he was add zicboz, but he
didn't want to add it - although he seems to have asked you to document
this. Drew, change of heart or am I not remembering correctly?
I think he cited some interpretation of the spec from Andrei W that
implied the Zicbop size would be the same as one of the other ones, but
I cannot find that on lore atm.
If Drew's okay with it, then I am too, so a conditional
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> index 97e8441eda1c..1660b296f7de 100644
> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> @@ -78,6 +78,11 @@ properties:
> description:
> The blocksize in bytes for the Zicbom cache operations.
>
> + riscv,cbop-block-size:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + The blocksize in bytes for the Zicbop cache operations.
> +
> riscv,cboz-block-size:
> $ref: /schemas/types.yaml#/definitions/uint32
> description:
> --
> 2.41.0
>
>
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next prev parent reply other threads:[~2023-10-29 14:53 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-29 12:35 [PATCH] dt-bindings: riscv: Document cbop-block-size Daniel Henrique Barboza
2023-10-29 14:53 ` Conor Dooley [this message]
2023-10-29 19:49 ` Daniel Henrique Barboza
2023-10-29 22:21 ` Conor Dooley
2023-10-30 8:18 ` Andrew Jones
2023-10-30 9:14 ` Daniel Henrique Barboza
2023-10-30 10:56 ` Conor Dooley
2024-01-03 11:56 ` Andrew Jones
2024-01-11 15:40 ` patchwork-bot+linux-riscv
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