From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7449ED27D; Tue, 31 Oct 2023 05:27:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="XMEkFqic" Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EEF13127; Mon, 30 Oct 2023 22:27:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1698730057; x=1730266057; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=C1uudXHVA96bE3M7IzGMDbFNA52Jp9HqO0R//AvJQXY=; b=XMEkFqiclX4//YGJSFwiloGSlQ4bcqtLddWWhhY/8JTJWdUsSS7rRoqf AxrxV4VRsD2iOKBEQGEcFNfPG/4Hmb03kcFL17XwpOd/u1LV0D9Doe8o+ xWsPcVE5R8MAVJ3XeTuzRVMWwDgyGPNAaHF2DazGHfiZXZuhZTzW/mqNa 0oEh5Kn0b7dWlnmUMdH6rSFxkCWI3Fxt1cky6LV9YEBzNyc2OuzBkcEnD Cx7bkkCaYo2xj4zQrqPpuPv8xWCiMhG9Sc4S04dri36wMTPtyVnJ5zDG+ qqM/RuNyKwjoUVwszgVauQRe7QOf9FOEUISZl7g8v301FLrhzyZo6q4II w==; X-CSE-ConnectionGUID: 7Mdkuys4ScWf0IbhX6cZYg== X-CSE-MsgGUID: BejErkrZQs2//qQqBo5PXQ== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,265,1694761200"; d="scan'208";a="10872670" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Oct 2023 22:27:36 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Mon, 30 Oct 2023 22:27:10 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Mon, 30 Oct 2023 22:27:05 -0700 From: shravan chippa To: , , , , , , CC: , , , , , , , Conor Dooley Subject: [PATCH v4 4/4] riscv: dts: microchip: add specific compatible for mpfs' pdma Date: Tue, 31 Oct 2023 10:57:53 +0530 Message-ID: <20231031052753.3430169-5-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231031052753.3430169-1-shravan.chippa@microchip.com> References: <20231031052753.3430169-1-shravan.chippa@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Shravan Chippa Add specific compatible for PolarFire SoC for The SiFive PDMA driver Reviewed-by: Conor Dooley Signed-off-by: Shravan Chippa --- arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index 104504352e99..f43486e9a090 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 { }; pdma: dma-controller@3000000 { - compatible = "sifive,fu540-c000-pdma", "sifive,pdma0"; + compatible = "microchip,mpfs-pdma", "sifive,pdma0"; reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic>; interrupts = <5 6>, <7 8>, <9 10>, <11 12>; -- 2.34.1