From: William Qiu <william.qiu@starfivetech.com>
To: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>, <linux-pwm@vger.kernel.org>
Cc: "Emil Renner Berthing" <kernel@esmil.dk>,
"Rob Herring" <robh+dt@kernel.org>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Hal Feng" <hal.feng@starfivetech.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"William Qiu" <william.qiu@starfivetech.com>
Subject: [PATCH v7 3/4] riscv: dts: starfive: jh7110: Add PWM node and pins configuration
Date: Fri, 10 Nov 2023 14:20:38 +0800 [thread overview]
Message-ID: <20231110062039.103339-4-william.qiu@starfivetech.com> (raw)
In-Reply-To: <20231110062039.103339-1-william.qiu@starfivetech.com>
Add OpenCores PWM controller node and add PWM pins configuration
on VisionFive 2 board.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
---
.../jh7110-starfive-visionfive-2.dtsi | 22 +++++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 9 ++++++++
2 files changed, 31 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 2c02358abd71..823f298c3f4c 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -268,6 +268,12 @@ reserved-data@600000 {
};
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins>;
+ status = "okay";
+};
+
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
@@ -402,6 +408,22 @@ GPOEN_SYS_SDIO1_DATA3,
};
};
+ pwm_pins: pwm-0 {
+ pwm-pins {
+ pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
+ GPOEN_SYS_PWM0_CHANNEL0,
+ GPI_NONE)>,
+ <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
+ GPOEN_SYS_PWM0_CHANNEL1,
+ GPI_NONE)>;
+ bias-disable;
+ drive-strength = <12>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ };
+
spi0_pins: spi0-0 {
mosi-pins {
pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index e85464c328d0..74630feff7a8 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -736,6 +736,15 @@ spi6: spi@120a0000 {
status = "disabled";
};
+ pwm: pwm@120d0000 {
+ compatible = "starfive,jh7110-pwm", "opencores,pwm";
+ reg = <0x0 0x120d0000 0x0 0x10000>;
+ clocks = <&syscrg JH7110_SYSCLK_PWM_APB>;
+ resets = <&syscrg JH7110_SYSRST_PWM_APB>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
sfctemp: temperature-sensor@120e0000 {
compatible = "starfive,jh7110-temp";
reg = <0x0 0x120e0000 0x0 0x10000>;
--
2.34.1
next prev parent reply other threads:[~2023-11-10 6:20 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-10 6:20 [PATCH v7 0/4] StarFive's Pulse Width Modulation driver support William Qiu
2023-11-10 6:20 ` [PATCH v7 1/4] dt-bindings: pwm: Add OpenCores PWM module William Qiu
2023-11-10 12:24 ` Krzysztof Kozlowski
2023-11-13 9:42 ` William Qiu
2023-11-13 20:07 ` Krzysztof Kozlowski
2023-11-13 20:17 ` Conor Dooley
2023-11-22 7:03 ` William Qiu
2023-11-22 17:36 ` Conor Dooley
2023-11-24 7:38 ` William Qiu
2023-11-24 12:44 ` Conor Dooley
2023-11-10 12:24 ` Krzysztof Kozlowski
2023-11-13 9:43 ` William Qiu
2023-11-10 6:20 ` [PATCH v7 2/4] pwm: opencores: Add PWM driver support William Qiu
2023-11-10 12:27 ` Krzysztof Kozlowski
2023-11-13 9:47 ` William Qiu
2023-11-10 6:20 ` William Qiu [this message]
2023-11-10 6:20 ` [PATCH v7 4/4] riscv: dts: starfive: jh7100: Add PWM node and pins configuration William Qiu
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