From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ABB3E568E for ; Fri, 10 Nov 2023 06:20:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=none Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BCF16A5E; Thu, 9 Nov 2023 22:20:53 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 6806524E2A0; Fri, 10 Nov 2023 14:20:45 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 10 Nov 2023 14:20:45 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 10 Nov 2023 14:20:44 +0800 From: William Qiu To: , , , CC: Emil Renner Berthing , Rob Herring , Thierry Reding , Philipp Zabel , Krzysztof Kozlowski , Conor Dooley , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , "Hal Feng" , Paul Walmsley , Palmer Dabbelt , Albert Ou , William Qiu Subject: [PATCH v7 4/4] riscv: dts: starfive: jh7100: Add PWM node and pins configuration Date: Fri, 10 Nov 2023 14:20:39 +0800 Message-ID: <20231110062039.103339-5-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231110062039.103339-1-william.qiu@starfivetech.com> References: <20231110062039.103339-1-william.qiu@starfivetech.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: quoted-printable Add OpenCores PWM controller node and add PWM pins configuration on VisionFive 1 board. Signed-off-by: William Qiu Reviewed-by: Hal Feng --- .../boot/dts/starfive/jh7100-common.dtsi | 24 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7100.dtsi | 9 +++++++ 2 files changed, 33 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv= /boot/dts/starfive/jh7100-common.dtsi index b93ce351a90f..11876906cc05 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi @@ -84,6 +84,24 @@ GPO_I2C2_PAD_SDA_OEN, }; }; =20 + pwm_pins: pwm-0 { + pwm-pins { + pinmux =3D , + ; + bias-disable; + drive-strength =3D <35>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + }; + uart3_pins: uart3-0 { rx-pins { pinmux =3D ; }; =20 +&pwm { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm_pins>; + status =3D "okay"; +}; + &uart3 { pinctrl-names =3D "default"; pinctrl-0 =3D <&uart3_pins>; diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/d= ts/starfive/jh7100.dtsi index 35ab54fb235f..9a7192b0684c 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -274,6 +274,15 @@ watchdog@12480000 { <&rstgen JH7100_RSTN_WDT>; }; =20 + pwm: pwm@12490000 { + compatible =3D "starfive,jh7100-pwm", "opencores,pwm"; + reg =3D <0x0 0x12490000 0x0 0x10000>; + clocks =3D <&clkgen JH7100_CLK_PWM_APB>; + resets =3D <&rstgen JH7100_RSTN_PWM_APB>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + sfctemp: temperature-sensor@124a0000 { compatible =3D "starfive,jh7100-temp"; reg =3D <0x0 0x124a0000 0x0 0x10000>; --=20 2.34.1