[PATCH 1/2] dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs

Inochi Amaoto
2023-11-13T02:23:26Z

To make thead aclint timer more closer to the aclint spec, use two regs
to represent the mtime and mtimecmp.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Fixes: 4734449f7311 ("dt-bindings: timer: Add Sophgo sg2042 CLINT timer")
Link: https://lists.infradead.org/pipermail/opensbi/2023-October/005693.html
Link: https://lists.infradead.org/pipermail/opensbi/2023-October/005738.html
Link: https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc
---
.../devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
index fbd235650e52..c3080962d902 100644
--- a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
+++ b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
@@ -17,7 +17,7 @@ properties:
- const: thead,c900-aclint-mtimer

reg:
- maxItems: 1
+ maxItems: 2

interrupts-extended:
minItems: 1
@@ -38,6 +38,7 @@ examples:
<&cpu2intc 7>,
<&cpu3intc 7>,
<&cpu4intc 7>;
- reg = <0xac000000 0x00010000>;
+ reg = <0xac000000 0x00000000>,
+ <0xac000000 0x0000c000>;
};
...
--
2.42.1