From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="mFKodwPq" Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88D56112; Wed, 22 Nov 2023 06:14:48 -0800 (PST) Received: by mail.gandi.net (Postfix) with ESMTPSA id 263EEE0011; Wed, 22 Nov 2023 14:14:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1700662487; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3KqnBhwi67VqJqEoEy9XgHZcNT6TUUQXGFk1xEUCrIQ=; b=mFKodwPq4XOUO1X1XcibL+8nMe9XB2JJRjnKkfHqLckGDyaeWKiuYJTspH43lAh2MMUqgb Qgl0bLjHxCAsJKkAftPb0N/8HLSsGtaumW1znjqEM5Xv/5TGfmJYYvuodfgVXK1erKLEWX v9Tug1WHllDB4hKux38EXU4BbxCZ//nxfU998j1nMRi/dYJyoDVsszmP/2m7SpFLGw6IRC 3sdWylHC7tFAZYMXHptccD0bs98KrK9GxpDhyMkRDiuKAcEVRQK5JVprR+cq1aNHnZmJdE BTNtXSRttySKoQ++jV8cTMna7Hfbdd//PVhenW/5zvsHHWniq25kkbJ6F/8qmw== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Laurent Pinchart , Michael Turquette , Stephen Boyd , Paul Kocialkowski , Rob Herring Subject: [PATCH v7 1/7] clk: sunxi-ng: v3s: Export MBUS and DRAM clocks to the public header Date: Wed, 22 Nov 2023 15:14:19 +0100 Message-ID: <20231122141426.329694-2-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.42.1 In-Reply-To: <20231122141426.329694-1-paul.kocialkowski@bootlin.com> References: <20231122141426.329694-1-paul.kocialkowski@bootlin.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-GND-Sasl: paul.kocialkowski@bootlin.com In order to declare a mbus node for the v3s, expose its associated clocks to the public header. Signed-off-by: Paul Kocialkowski Reviewed-by: Samuel Holland Acked-by: Rob Herring --- drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 4 ---- include/dt-bindings/clock/sun8i-v3s-ccu.h | 4 ++-- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h index 345cdbbab362..c933ef016570 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h @@ -39,14 +39,10 @@ /* The first bunch of module clocks are exported */ -#define CLK_DRAM 58 - /* All the DRAM gates are exported */ /* Some more module clocks are exported */ -#define CLK_MBUS 72 - /* And the GPU module clock is exported */ #define CLK_PLL_DDR1 74 diff --git a/include/dt-bindings/clock/sun8i-v3s-ccu.h b/include/dt-bindings/clock/sun8i-v3s-ccu.h index 014ac6123d17..4231f23bc53b 100644 --- a/include/dt-bindings/clock/sun8i-v3s-ccu.h +++ b/include/dt-bindings/clock/sun8i-v3s-ccu.h @@ -87,7 +87,7 @@ #define CLK_SPI0 55 #define CLK_USB_PHY0 56 #define CLK_USB_OHCI0 57 - +#define CLK_DRAM 58 #define CLK_DRAM_VE 59 #define CLK_DRAM_CSI 60 #define CLK_DRAM_EHCI 61 @@ -101,7 +101,7 @@ #define CLK_VE 69 #define CLK_AC_DIG 70 #define CLK_AVS 71 - +#define CLK_MBUS 72 #define CLK_MIPI_CSI 73 /* Clocks not available on V3s */ -- 2.42.1