From: Conor Dooley <conor@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Inochi Amaoto <inochiama@outlook.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Chen Wang <unicorn_wang@outlook.com>,
Anup Patel <anup@brainfault.org>,
Samuel Holland <samuel.holland@sifive.com>,
Guo Ren <guoren@kernel.org>, Jisheng Zhang <jszhang@kernel.org>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v4 1/2] dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs
Date: Thu, 30 Nov 2023 12:10:03 +0000 [thread overview]
Message-ID: <20231130-laborious-dwarf-6913457466ad@spud> (raw)
In-Reply-To: <CAK9=C2WgN=3BjxS+nF2ibFQoquNwXfxr_UQv8Kbf1+e4Teyfcw@mail.gmail.com>
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On Thu, Nov 30, 2023 at 05:18:15PM +0530, Anup Patel wrote:
> On Thu, Nov 30, 2023 at 5:15 PM Conor Dooley <conor@kernel.org> wrote:
> > > and add separate "riscv" prefixed DT binding for RISC-V mtimer.
> >
> > Do you know of any users for a "riscv,mtimer" binding that are not
> > covered by existing bindings for the clint?
>
> Ventana Veyron-v1 implements a mtimer per-cluster (or chiplet)
> which is compatible to "riscv,mtimer" (i.e. we have both mtime
> and mtimecmp MMIO registers).
Okay, thanks. I guess iff veyron-v1 DT support shows up (or other
similar devices) we can go ahead with a "riscv,mtimer" binding then.
I had thought that you guys were going to be using ACPI though, so
I guess the "other similar devices" applies.
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next prev parent reply other threads:[~2023-11-30 12:10 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-18 7:06 [PATCH v4 0/2] Change the sg2042 timer layout to fit aclint format Inochi Amaoto
2023-11-18 7:10 ` [PATCH v4 1/2] dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs Inochi Amaoto
2023-11-20 16:52 ` Conor Dooley
2023-11-21 1:12 ` Inochi Amaoto
2023-11-21 13:03 ` Conor Dooley
2023-11-22 1:26 ` Inochi Amaoto
2023-11-30 8:03 ` Inochi Amaoto
2023-11-21 5:22 ` Chen Wang
2023-11-30 9:31 ` Anup Patel
2023-11-30 9:57 ` Conor Dooley
2023-11-30 11:21 ` Anup Patel
2023-11-30 11:45 ` Conor Dooley
2023-11-30 11:48 ` Anup Patel
2023-11-30 12:10 ` Conor Dooley [this message]
2023-11-30 12:24 ` Anup Patel
2023-11-30 12:31 ` Inochi Amaoto
2023-11-30 12:23 ` Inochi Amaoto
2023-11-18 7:10 ` [PATCH v4 2/2] riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format Inochi Amaoto
2023-11-21 5:23 ` Chen Wang
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