From: Conor Dooley <conor@kernel.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Subject: Re: [PATCH v1 0/8] Add JH7100 errata and update device tree
Date: Thu, 30 Nov 2023 14:12:22 +0000 [thread overview]
Message-ID: <20231130-skating-shindig-af43058fc8ff@spud> (raw)
In-Reply-To: <20231126232746.264302-1-emil.renner.berthing@canonical.com>
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On Mon, Nov 27, 2023 at 12:27:38AM +0100, Emil Renner Berthing wrote:
> Now that the driver for the SiFive cache controller supports manual
> flushing as non-standard cache operations[1] we can add an errata option
> for the StarFive JH7100 SoC and update the device tree with the cache
> controller, dedicated DMA pool and add MMC nodes for the SD-card and
> wifi.
>
> This series needs the following commit in [1] to work properly:
>
> 0d5701dc9cd6 ("soc: sifive: ccache: Add StarFive JH7100 support")
>
> [1]: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=riscv-soc-for-next
This stuff all seems fine to me. I'd like Palmer to take the first
patch, or I suppose I could take it alongside the cache driver changes
with an Ack.
Cheers,
Conor.
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next prev parent reply other threads:[~2023-11-30 14:12 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-26 23:27 [PATCH v1 0/8] Add JH7100 errata and update device tree Emil Renner Berthing
2023-11-26 23:27 ` [PATCH v1 1/8] riscv: errata: Add StarFive JH7100 errata Emil Renner Berthing
2023-11-30 14:05 ` Conor Dooley
2023-11-26 23:27 ` [PATCH v1 2/8] riscv: dts: starfive: Group tuples in interrupt properties Emil Renner Berthing
2023-11-30 14:05 ` Conor Dooley
2023-11-26 23:27 ` [PATCH v1 3/8] riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs Emil Renner Berthing
2023-11-26 23:27 ` [PATCH v1 4/8] riscv: dts: starfive: Add JH7100 cache controller Emil Renner Berthing
2023-11-26 23:27 ` [PATCH v1 5/8] riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards Emil Renner Berthing
2023-11-26 23:27 ` [PATCH v1 6/8] riscv: dts: starfive: Add JH7100 MMC nodes Emil Renner Berthing
2023-11-26 23:27 ` [PATCH v1 7/8] riscv: dts: starfive: Enable SD-card on JH7100 boards Emil Renner Berthing
2023-11-26 23:27 ` [PATCH v1 8/8] riscv: dts: starfive: Enable SDIO wifi " Emil Renner Berthing
2023-11-30 14:12 ` Conor Dooley [this message]
2023-11-30 15:04 ` [PATCH v1 0/8] Add JH7100 errata and update device tree Emil Renner Berthing
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