From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0DB68F5C for ; Sun, 3 Dec 2023 11:03:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kRgOQtlY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D4313C433C7; Sun, 3 Dec 2023 11:03:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701601437; bh=RL9hj4/npBVWsIIkeQ9nIijIaQvVjE1SR3pmSj6oEg8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=kRgOQtlY1EdSeAzCqTTGDvINRhqHIMsl8+LQeFZaNzcd/5G3CZAlbg+SOtS9kuIMv 68YQgJfICsQHDs9pFWFtFwyUmm3Nae8OnqyIx+HkdZXP8KxoEmQdLJj4BK+wSvgzm5 uSLa3Dyo+XY6EPvYNR7WSB0ZOWGtBK0d6ZodlAVj9fd1WLXUHVo3BgJs0Qq5Lyq+hY csPMxzR7YNBQiYIUf7jDrYeh2m1eGixPIPQDZCI67+UI49nEbxz7CHGj3x8K7dW9Q7 id7NTjtXqaCvnU005DSuJPlRgnM4plT34q3XmH2A/94r74ekRCYG+X3/C5OZPhA59J Do5H20Z90k9ng== Date: Sun, 3 Dec 2023 11:03:52 +0000 From: Conor Dooley To: Emil Renner Berthing Cc: linux-riscv@lists.infradead.org, Conor Dooley , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Walker Chen , JeeHeng Sia , Leyfoon Tan Subject: Re: [PATCH v1] riscv: dts: starfive: move timebase-frequency to .dtsi Message-ID: <20231203-mountable-snowsuit-24e4252c9eb5@spud> References: <20231130-bobbing-valid-b97f26fe8edc@spud> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="gsgU8ZMzlqhOxgDu" Content-Disposition: inline In-Reply-To: --gsgU8ZMzlqhOxgDu Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Dec 01, 2023 at 02:44:58PM +0100, Emil Renner Berthing wrote: > Conor Dooley wrote: > > From: Conor Dooley > > > > Properties fixed by the SoC should be defined in the $soc.dtsi, and the > > timebase-frequency is not sourced directly from an off-chip oscillator. >=20 > Yes, according to the JH7100 docs[1] the mtime register is sourced from t= he > osc_sys external oscillator through u74rtc_toggle. However I haven't yet = found > a place in the docs that describe where that clock is divided by 4 to get > 6.25MHz from the 25MHz. >=20 > I expect the JH7110 mtime is set up in a similar way, but haven't yet dug= into > the available documentation. Your other reply suggests that this is a fixed division for the jh7110, in which case it makes sense to leave it as-is. mpfs is different in that it is fixed to 1 MHz regardless of which of the permitted external oscillator frequencies you use. --gsgU8ZMzlqhOxgDu Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZWxgmAAKCRB4tDGHoIJi 0sJtAP4pMEN4NONQarXTexQ+6rwQOXlXvIdECO8PYelODQxL6gD9EEx+82qjL5N0 b/REnWOnOFlHnGcBijTAen08Qqc6uAA= =tfLH -----END PGP SIGNATURE----- --gsgU8ZMzlqhOxgDu--