From: Sia Jee Heng <jeeheng.sia@starfivetech.com>
To: <kernel@esmil.dk>, <conor@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<p.zabel@pengutronix.de>, <emil.renner.berthing@canonical.com>,
<hal.feng@starfivetech.com>, <xingyu.wu@starfivetech.com>
Cc: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<jeeheng.sia@starfivetech.com>, <leyfoon.tan@starfivetech.com>,
Joshua Yeong <joshua.yeong@starfivetech.com>
Subject: [PATCH v1 15/16] reset: starfive: Add StarFive JH8100 reset driver
Date: Wed, 6 Dec 2023 19:49:59 +0800 [thread overview]
Message-ID: <20231206115000.295825-16-jeeheng.sia@starfivetech.com> (raw)
In-Reply-To: <20231206115000.295825-1-jeeheng.sia@starfivetech.com>
Add auxiliary reset driver to support StarFive JH8100 SoC.
Co-developed-by: Joshua Yeong <joshua.yeong@starfivetech.com>
Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com>
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
---
MAINTAINERS | 7 ++
drivers/reset/starfive/Kconfig | 8 ++
drivers/reset/starfive/Makefile | 2 +
.../reset/starfive/reset-starfive-jh8100.c | 102 ++++++++++++++++++
4 files changed, 119 insertions(+)
create mode 100644 drivers/reset/starfive/reset-starfive-jh8100.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 87bcb25becc1..ed728f013d32 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20771,6 +20771,13 @@ F: Documentation/devicetree/bindings/clock/starfive,jh81*.yaml
F: drivers/clk/starfive/jh8100
F: include/dt-bindings/clock/starfive?jh81*.h
+STARFIVE JH8100 RESET CONTROLLER DRIVERS
+M: Sia Jee Heng <jeeheng.sia@starfivetech.com>
+M: Ley Foon Tan <leyfoon.tan@starfivetech.com>
+S: Maintained
+F: drivers/reset/starfive/reset-starfive-jh81*
+F: include/dt-bindings/reset/starfive?jh81*.h
+
STATIC BRANCH/CALL
M: Peter Zijlstra <peterz@infradead.org>
M: Josh Poimboeuf <jpoimboe@kernel.org>
diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
index 29fbcf1a7d83..88d050044d52 100644
--- a/drivers/reset/starfive/Kconfig
+++ b/drivers/reset/starfive/Kconfig
@@ -19,3 +19,11 @@ config RESET_STARFIVE_JH7110
default ARCH_STARFIVE
help
This enables the reset controller driver for the StarFive JH7110 SoC.
+
+config RESET_STARFIVE_JH8100
+ bool "StarFive JH8100 Reset Driver"
+ depends on AUXILIARY_BUS && CLK_STARFIVE_JH8100_SYS
+ select RESET_STARFIVE_COMMON
+ default ARCH_STARFIVE
+ help
+ This enables the reset controller driver for the StarFive JH8100 SoC.
diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile
index 582e4c160bd4..ede1fc1c9601 100644
--- a/drivers/reset/starfive/Makefile
+++ b/drivers/reset/starfive/Makefile
@@ -3,3 +3,5 @@ obj-$(CONFIG_RESET_STARFIVE_COMMON) += reset-starfive-common.o
obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
obj-$(CONFIG_RESET_STARFIVE_JH7110) += reset-starfive-jh7110.o
+
+obj-$(CONFIG_RESET_STARFIVE_JH8100) += reset-starfive-jh8100.o
diff --git a/drivers/reset/starfive/reset-starfive-jh8100.c b/drivers/reset/starfive/reset-starfive-jh8100.c
new file mode 100644
index 000000000000..84f3781a22a5
--- /dev/null
+++ b/drivers/reset/starfive/reset-starfive-jh8100.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Reset driver for the StarFive JH8100 SoC
+ *
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
+ */
+
+#include <dt-bindings/reset/starfive,jh8100-crg.h>
+#include <linux/auxiliary_bus.h>
+#include <soc/starfive/reset-starfive-common.h>
+
+#include "reset-starfive-common.h"
+
+struct jh8100_reset_info {
+ unsigned int nr_resets;
+ unsigned int assert_offset;
+ unsigned int status_offset;
+};
+
+static const struct jh8100_reset_info jh8100_sys_info = {
+ .nr_resets = SYSCRG_RESET_NR_RESETS,
+ .assert_offset = 0x1B4,
+ .status_offset = 0x1B8,
+};
+
+static const struct jh8100_reset_info jh8100_sys_nw_info = {
+ .nr_resets = SYSCRG_NW_RESET_NR_RESETS,
+ .assert_offset = 0xA4,
+ .status_offset = 0xA8,
+};
+
+static const struct jh8100_reset_info jh8100_sys_ne_info = {
+ .nr_resets = SYSCRG_NE_RESET_NR_RESETS,
+ .assert_offset = 0x2BC,
+ .status_offset = 0x2C4,
+};
+
+static const struct jh8100_reset_info jh8100_sys_sw_info = {
+ .nr_resets = SYSCRG_SW_RESET_NR_RESETS,
+ .assert_offset = 0x28,
+ .status_offset = 0x2C,
+};
+
+static const struct jh8100_reset_info jh8100_aon_info = {
+ .nr_resets = AONCRG_RESET_NR_RESETS,
+ .assert_offset = 0x104,
+ .status_offset = 0x108,
+};
+
+static int jh8100_reset_probe(struct auxiliary_device *adev,
+ const struct auxiliary_device_id *id)
+{
+ struct jh8100_reset_info *info = (struct jh8100_reset_info *)
+ (id->driver_data);
+ struct starfive_reset_adev *rdev = to_starfive_reset_adev(adev);
+ void __iomem *base = rdev->base;
+
+ if (!info || !base)
+ return -ENODEV;
+
+ return reset_starfive_register(&adev->dev,
+ adev->dev.parent->of_node,
+ base + info->assert_offset,
+ base + info->status_offset, NULL,
+ info->nr_resets, NULL);
+}
+
+static const struct auxiliary_device_id jh8100_reset_ids[] = {
+ {
+ .name = "clk_sys.rst-sys",
+ .driver_data = (kernel_ulong_t)&jh8100_sys_info,
+ },
+ {
+ .name = "clk_sys.rst-sys-nw",
+ .driver_data = (kernel_ulong_t)&jh8100_sys_nw_info,
+ },
+ {
+ .name = "clk_sys.rst-sys-ne",
+ .driver_data = (kernel_ulong_t)&jh8100_sys_ne_info,
+ },
+ {
+ .name = "clk_sys.rst-sys-sw",
+ .driver_data = (kernel_ulong_t)&jh8100_sys_sw_info,
+ },
+ {
+ .name = "clk_sys.rst-aon",
+ .driver_data = (kernel_ulong_t)&jh8100_aon_info,
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(auxiliary, jh8100_reset_ids);
+
+static struct auxiliary_driver jh8100_reset_driver = {
+ .probe = jh8100_reset_probe,
+ .id_table = jh8100_reset_ids,
+};
+module_auxiliary_driver(jh8100_reset_driver);
+
+MODULE_AUTHOR("Joshua Yeong <joshua.yeong@starfivetech.com>");
+MODULE_AUTHOR("Sia Jee Heng <jeeheng.sia@starfivetech.com>");
+MODULE_DESCRIPTION("StarFive JH8100 reset driver");
+MODULE_LICENSE("GPL");
--
2.34.1
next prev parent reply other threads:[~2023-12-06 11:52 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-06 11:49 [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 01/16] reset: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2023-12-08 13:12 ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 02/16] reset: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2023-12-08 13:15 ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 03/16] clk: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2023-12-08 13:16 ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 04/16] clk: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2023-12-08 13:24 ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 05/16] dt-bindings: clock: Add StarFive JH8100 System clock and reset generator Sia Jee Heng
2023-12-08 17:52 ` Krzysztof Kozlowski
2023-12-12 2:47 ` JeeHeng Sia
2023-12-12 8:43 ` Krzysztof Kozlowski
2023-12-12 10:04 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 06/16] clk: starfive: Add JH8100 System clock generator driver Sia Jee Heng
2023-12-08 16:25 ` Emil Renner Berthing
2023-12-12 0:46 ` JeeHeng Sia
2023-12-13 11:56 ` Emil Renner Berthing
2023-12-19 3:02 ` JeeHeng Sia
2023-12-19 17:39 ` Emil Renner Berthing
2023-12-20 1:35 ` JeeHeng Sia
2023-12-20 1:39 ` JeeHeng Sia
2023-12-20 13:07 ` Emil Renner Berthing
2023-12-21 0:45 ` JeeHeng Sia
2023-12-13 4:20 ` JeeHeng Sia
2023-12-13 12:05 ` Emil Renner Berthing
2023-12-20 1:34 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 07/16] dt-bindings: clock: Add StarFive JH8100 System-North-West clock and reset generator Sia Jee Heng
2023-12-08 16:37 ` Emil Renner Berthing
2023-12-12 1:01 ` JeeHeng Sia
2023-12-13 12:00 ` Emil Renner Berthing
2023-12-08 17:53 ` Krzysztof Kozlowski
2023-12-12 2:48 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 08/16] clk: starfive: Add JH8100 System-North-West clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 09/16] dt-bindings: clock: Add StarFive JH8100 System-North-East clock and reset generator Sia Jee Heng
2023-12-08 17:54 ` Krzysztof Kozlowski
2023-12-12 2:49 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 10/16] clk: starfive: Add JH8100 System-North-East clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 11/16] dt-bindings: clock: Add StarFive JH8100 System-South-West clock and reset generator Sia Jee Heng
2023-12-08 17:54 ` Krzysztof Kozlowski
2023-12-12 2:49 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 12/16] clk: starfive: Add JH8100 System-South-West clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 13/16] dt-bindings: clock: Add StarFive JH8100 Always-On clock and reset generator Sia Jee Heng
2023-12-08 17:55 ` Krzysztof Kozlowski
2023-12-12 2:49 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 14/16] clk: starfive: Add JH8100 Always-On clock generator driver Sia Jee Heng
2023-12-06 11:49 ` Sia Jee Heng [this message]
2023-12-06 11:50 ` [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes Sia Jee Heng
2023-12-08 16:39 ` Emil Renner Berthing
2023-12-08 17:57 ` Krzysztof Kozlowski
2023-12-12 2:51 ` JeeHeng Sia
2023-12-12 1:07 ` JeeHeng Sia
2023-12-08 17:57 ` Krzysztof Kozlowski
2023-12-12 2:58 ` JeeHeng Sia
2023-12-12 8:43 ` Krzysztof Kozlowski
2023-12-12 10:03 ` JeeHeng Sia
2023-12-08 16:52 ` [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Emil Renner Berthing
2023-12-12 1:09 ` JeeHeng Sia
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