* [PATCH] dt-bindings: mailbox: add Versal IPI bindings
@ 2023-11-30 1:19 Tanmay Shah
2023-12-06 15:09 ` Rob Herring
0 siblings, 1 reply; 3+ messages in thread
From: Tanmay Shah @ 2023-11-30 1:19 UTC (permalink / raw)
To: jassisinghbrar, robh+dt, krzysztof.kozlowski+dt, conor+dt,
shubhrajyoti.datta, michal.simek
Cc: linux-kernel, devicetree, ben.levinsky, Tanmay Shah
Add documentation for AMD-Xilinx Versal platform Inter Processor Interrupt
controller. These bindings are different from previous
xlnx,zynqmp-ipi-mailbox bindings and hence introduced in separate file.
However, same existing driver will be extended for devices that are based
on Versal bindings.
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
---
.../mailbox/xlnx,versal-ipi-mailbox.yaml | 174 ++++++++++++++++++
1 file changed, 174 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
diff --git a/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
new file mode 100644
index 000000000000..4408b59d392d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
@@ -0,0 +1,174 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/xlnx,versal-ipi-mailbox.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx IPI(Inter Processor Interrupt) mailbox controller
+
+description: |
+ The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
+ messaging between two IPI agents. Each IPI agent owns registers used for
+ notification and buffers for message.
+
+ +-------------------------------------+
+ | Xilinx IPI Controller |
+ +-------------------------------------+
+ +--------------------------------------------------+
+ TF-A | |
+ | |
+ | |
+ +--------------------------+ |
+ | |
+ | |
+ +--------------------------------------------------+
+ +------------------------------------------+
+ | +----------------+ +----------------+ |
+ Hardware | | IPI Agent | | IPI Buffers | |
+ | | Registers | | (optional) | |
+ | | | | | |
+ | +----------------+ +----------------+ |
+ | |
+ | Xilinx IPI Agent Block |
+ +------------------------------------------+
+
+maintainers:
+ - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
+
+properties:
+ compatible:
+ const: xlnx,versal-ipi-mailbox
+
+ method:
+ description: |
+ The method of calling the PM-API firmware layer.
+ Permitted values are.
+ - "smc" : SMC
+ - "hvc" : HVC
+
+ $ref: /schemas/types.yaml#/definitions/string
+ enum:
+ - smc
+ - hvc
+ default: smc
+
+ '#address-cells':
+ const: 2
+
+ '#size-cells':
+ const: 2
+
+ reg:
+ minItems: 1
+ items:
+ - description: Host IPI agent control registers
+ - description: Host IPI agent optional message buffers
+
+ reg-names:
+ minItems: 1
+ items:
+ - const: ctrl
+ - const: msg
+
+ xlnx,ipi-id:
+ description: |
+ Remote Xilinx IPI agent ID of which the mailbox is connected to.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ interrupts:
+ maxItems: 1
+
+ ranges: true
+
+patternProperties:
+ '^mailbox@[0-9a-f]+$':
+ description: Internal ipi mailbox node
+ type: object
+
+ properties:
+
+ compatible:
+ const: xlnx,versal-ipi-dest-mailbox
+
+ xlnx,ipi-id:
+ description:
+ Remote Xilinx IPI agent ID of which the mailbox is connected to.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ '#mbox-cells':
+ const: 1
+ description:
+ It contains tx(0) or rx(1) channel IPI id number.
+
+ reg:
+ minItems: 1
+ items:
+ - description: Host IPI agent control registers
+ - description: Host IPI agent optional message buffers
+
+ reg-names:
+ minItems: 1
+ items:
+ - const: ctrl
+ - const: msg
+
+ additionalProperties: false
+
+ required:
+ - compatible
+ - reg
+ - reg-names
+ - xlnx,ipi-id
+ - "#mbox-cells"
+
+additionalProperties: false
+
+required:
+ - compatible
+ - interrupts
+ - '#address-cells'
+ - '#size-cells'
+ - reg
+ - reg-names
+ - xlnx,ipi-id
+
+examples:
+ - |
+ #include<dt-bindings/interrupt-controller/arm-gic.h>
+
+ amba {
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+ zynqmp-mailbox@ff300000 {
+ compatible = "xlnx,versal-ipi-mailbox";
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ xlnx,ipi-id = <0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0xff300000 0x0 0x1000>,
+ <0x0 0xff990000 0x0 0x1ff>;
+ reg-names = "ctrl", "msg";
+ ranges;
+
+ /* buffered IPI */
+ mailbox@ff340000 {
+ compatible = "xlnx,versal-ipi-dest-mailbox";
+ reg = <0x0 0xff340000 0x0 0x1000>,
+ <0x0 0xff990400 0x0 0x1ff>;
+ reg-names = "ctrl", "msg";
+ #mbox-cells = <1>;
+ xlnx,ipi-id = <4>;
+ };
+
+ /* bufferless IPI */
+ mailbox@ff370000 {
+ compatible = "xlnx,versal-ipi-dest-mailbox";
+ reg = <0x0 0xff370000 0x0 0x1000>;
+ reg-names = "ctrl";
+ #mbox-cells = <1>;
+ xlnx,ipi-id = <7>;
+ };
+ };
+ };
+
+...
base-commit: 2cc14f52aeb78ce3f29677c2de1f06c0e91471ab
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: mailbox: add Versal IPI bindings
2023-11-30 1:19 [PATCH] dt-bindings: mailbox: add Versal IPI bindings Tanmay Shah
@ 2023-12-06 15:09 ` Rob Herring
2023-12-06 22:37 ` Tanmay Shah
0 siblings, 1 reply; 3+ messages in thread
From: Rob Herring @ 2023-12-06 15:09 UTC (permalink / raw)
To: Tanmay Shah
Cc: jassisinghbrar, krzysztof.kozlowski+dt, conor+dt,
shubhrajyoti.datta, michal.simek, linux-kernel, devicetree,
ben.levinsky
On Wed, Nov 29, 2023 at 05:19:36PM -0800, Tanmay Shah wrote:
> Add documentation for AMD-Xilinx Versal platform Inter Processor Interrupt
> controller. These bindings are different from previous
> xlnx,zynqmp-ipi-mailbox bindings and hence introduced in separate file.
> However, same existing driver will be extended for devices that are based
> on Versal bindings.
Looks to me like the binding doc could be shared.
>
> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> ---
> .../mailbox/xlnx,versal-ipi-mailbox.yaml | 174 ++++++++++++++++++
> 1 file changed, 174 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
>
> diff --git a/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
> new file mode 100644
> index 000000000000..4408b59d392d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
> @@ -0,0 +1,174 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mailbox/xlnx,versal-ipi-mailbox.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx IPI(Inter Processor Interrupt) mailbox controller
> +
> +description: |
> + The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
> + messaging between two IPI agents. Each IPI agent owns registers used for
> + notification and buffers for message.
> +
> + +-------------------------------------+
> + | Xilinx IPI Controller |
> + +-------------------------------------+
> + +--------------------------------------------------+
> + TF-A | |
> + | |
> + | |
> + +--------------------------+ |
> + | |
> + | |
> + +--------------------------------------------------+
> + +------------------------------------------+
> + | +----------------+ +----------------+ |
> + Hardware | | IPI Agent | | IPI Buffers | |
> + | | Registers | | (optional) | |
> + | | | | | |
> + | +----------------+ +----------------+ |
> + | |
> + | Xilinx IPI Agent Block |
> + +------------------------------------------+
> +
> +maintainers:
> + - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> +
> +properties:
> + compatible:
> + const: xlnx,versal-ipi-mailbox
> +
> + method:
> + description: |
> + The method of calling the PM-API firmware layer.
> + Permitted values are.
> + - "smc" : SMC
> + - "hvc" : HVC
The schema already says this, no need to do so twice.
> +
> + $ref: /schemas/types.yaml#/definitions/string
> + enum:
> + - smc
> + - hvc
> + default: smc
> +
> + '#address-cells':
> + const: 2
> +
> + '#size-cells':
> + const: 2
> +
> + reg:
> + minItems: 1
> + items:
> + - description: Host IPI agent control registers
> + - description: Host IPI agent optional message buffers
> +
> + reg-names:
> + minItems: 1
> + items:
> + - const: ctrl
> + - const: msg
> +
> + xlnx,ipi-id:
> + description: |
> + Remote Xilinx IPI agent ID of which the mailbox is connected to.
> + $ref: /schemas/types.yaml#/definitions/uint32
Any value 0-2^32 is valid?
Place vendor properties last.
> +
> + interrupts:
> + maxItems: 1
> +
> + ranges: true
> +
> +patternProperties:
> + '^mailbox@[0-9a-f]+$':
> + description: Internal ipi mailbox node
> + type: object
> +
> + properties:
> +
> + compatible:
> + const: xlnx,versal-ipi-dest-mailbox
> +
> + xlnx,ipi-id:
> + description:
> + Remote Xilinx IPI agent ID of which the mailbox is connected to.
> + $ref: /schemas/types.yaml#/definitions/uint32
Any value 0-2^32 is valid?
> +
> + '#mbox-cells':
> + const: 1
> + description:
> + It contains tx(0) or rx(1) channel IPI id number.
> +
> + reg:
> + minItems: 1
> + items:
> + - description: Host IPI agent control registers
> + - description: Host IPI agent optional message buffers
Same description as the parent? But the parent is not a mailbox (No
#mbox-cells)?
> +
> + reg-names:
> + minItems: 1
> + items:
> + - const: ctrl
> + - const: msg
> +
> + additionalProperties: false
> +
> + required:
> + - compatible
> + - reg
> + - reg-names
> + - xlnx,ipi-id
> + - "#mbox-cells"
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - interrupts
> + - '#address-cells'
> + - '#size-cells'
> + - reg
> + - reg-names
> + - xlnx,ipi-id
Same order as 'properties'.
> +
> +examples:
> + - |
> + #include<dt-bindings/interrupt-controller/arm-gic.h>
> +
> + amba {
bus {
> + #address-cells = <0x2>;
> + #size-cells = <0x2>;
> + zynqmp-mailbox@ff300000 {
> + compatible = "xlnx,versal-ipi-mailbox";
> + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> + xlnx,ipi-id = <0>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + reg = <0x0 0xff300000 0x0 0x1000>,
> + <0x0 0xff990000 0x0 0x1ff>;
> + reg-names = "ctrl", "msg";
> + ranges;
> +
> + /* buffered IPI */
> + mailbox@ff340000 {
> + compatible = "xlnx,versal-ipi-dest-mailbox";
> + reg = <0x0 0xff340000 0x0 0x1000>,
> + <0x0 0xff990400 0x0 0x1ff>;
> + reg-names = "ctrl", "msg";
> + #mbox-cells = <1>;
> + xlnx,ipi-id = <4>;
> + };
> +
> + /* bufferless IPI */
> + mailbox@ff370000 {
> + compatible = "xlnx,versal-ipi-dest-mailbox";
> + reg = <0x0 0xff370000 0x0 0x1000>;
> + reg-names = "ctrl";
> + #mbox-cells = <1>;
> + xlnx,ipi-id = <7>;
> + };
> + };
> + };
> +
> +...
>
> base-commit: 2cc14f52aeb78ce3f29677c2de1f06c0e91471ab
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: mailbox: add Versal IPI bindings
2023-12-06 15:09 ` Rob Herring
@ 2023-12-06 22:37 ` Tanmay Shah
0 siblings, 0 replies; 3+ messages in thread
From: Tanmay Shah @ 2023-12-06 22:37 UTC (permalink / raw)
To: Rob Herring
Cc: jassisinghbrar, krzysztof.kozlowski+dt, conor+dt,
shubhrajyoti.datta, michal.simek, linux-kernel, devicetree,
ben.levinsky
On 12/6/23 9:09 AM, Rob Herring wrote:
> On Wed, Nov 29, 2023 at 05:19:36PM -0800, Tanmay Shah wrote:
> > Add documentation for AMD-Xilinx Versal platform Inter Processor Interrupt
> > controller. These bindings are different from previous
> > xlnx,zynqmp-ipi-mailbox bindings and hence introduced in separate file.
> > However, same existing driver will be extended for devices that are based
> > on Versal bindings.
>
> Looks to me like the binding doc could be shared.
Hi Rob,
Thanks for reviews.
Next revision I will share bindings doc.
>
> >
> > Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> > ---
> > .../mailbox/xlnx,versal-ipi-mailbox.yaml | 174 ++++++++++++++++++
> > 1 file changed, 174 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
> > new file mode 100644
> > index 000000000000..4408b59d392d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mailbox/xlnx,versal-ipi-mailbox.yaml
> > @@ -0,0 +1,174 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/mailbox/xlnx,versal-ipi-mailbox.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Xilinx IPI(Inter Processor Interrupt) mailbox controller
> > +
> > +description: |
> > + The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
> > + messaging between two IPI agents. Each IPI agent owns registers used for
> > + notification and buffers for message.
> > +
> > + +-------------------------------------+
> > + | Xilinx IPI Controller |
> > + +-------------------------------------+
> > + +--------------------------------------------------+
> > + TF-A | |
> > + | |
> > + | |
> > + +--------------------------+ |
> > + | |
> > + | |
> > + +--------------------------------------------------+
> > + +------------------------------------------+
> > + | +----------------+ +----------------+ |
> > + Hardware | | IPI Agent | | IPI Buffers | |
> > + | | Registers | | (optional) | |
> > + | | | | | |
> > + | +----------------+ +----------------+ |
> > + | |
> > + | Xilinx IPI Agent Block |
> > + +------------------------------------------+
> > +
> > +maintainers:
> > + - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> > +
> > +properties:
> > + compatible:
> > + const: xlnx,versal-ipi-mailbox
> > +
> > + method:
> > + description: |
> > + The method of calling the PM-API firmware layer.
> > + Permitted values are.
> > + - "smc" : SMC
> > + - "hvc" : HVC
>
> The schema already says this, no need to do so twice.
Ok I will remove from description.
>
> > +
> > + $ref: /schemas/types.yaml#/definitions/string
> > + enum:
> > + - smc
> > + - hvc
> > + default: smc
> > +
> > + '#address-cells':
> > + const: 2
> > +
> > + '#size-cells':
> > + const: 2
> > +
> > + reg:
> > + minItems: 1
> > + items:
> > + - description: Host IPI agent control registers
> > + - description: Host IPI agent optional message buffers
> > +
> > + reg-names:
> > + minItems: 1
> > + items:
> > + - const: ctrl
> > + - const: msg
> > +
> > + xlnx,ipi-id:
> > + description: |
> > + Remote Xilinx IPI agent ID of which the mailbox is connected to.
> > + $ref: /schemas/types.yaml#/definitions/uint32
>
> Any value 0-2^32 is valid?
No there are some limit on what is valid IPI ID. I will put valid range.
>
> Place vendor properties last.
Ack.
>
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + ranges: true
> > +
> > +patternProperties:
> > + '^mailbox@[0-9a-f]+$':
> > + description: Internal ipi mailbox node
> > + type: object
> > +
> > + properties:
> > +
> > + compatible:
> > + const: xlnx,versal-ipi-dest-mailbox
> > +
> > + xlnx,ipi-id:
> > + description:
> > + Remote Xilinx IPI agent ID of which the mailbox is connected to.
> > + $ref: /schemas/types.yaml#/definitions/uint32
>
> Any value 0-2^32 is valid?
Here as well. I will put valid range.
>
> > +
> > + '#mbox-cells':
> > + const: 1
> > + description:
> > + It contains tx(0) or rx(1) channel IPI id number.
> > +
> > + reg:
> > + minItems: 1
> > + items:
> > + - description: Host IPI agent control registers
> > + - description: Host IPI agent optional message buffers
>
> Same description as the parent? But the parent is not a mailbox (No
> #mbox-cells)?
Thanks. Yes it should say Remote IPI agent. I will fix this in next revision.
>
> > +
> > + reg-names:
> > + minItems: 1
> > + items:
> > + - const: ctrl
> > + - const: msg
> > +
> > + additionalProperties: false
> > +
> > + required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - xlnx,ipi-id
> > + - "#mbox-cells"
> > +
> > +additionalProperties: false
> > +
> > +required:
> > + - compatible
> > + - interrupts
> > + - '#address-cells'
> > + - '#size-cells'
> > + - reg
> > + - reg-names
> > + - xlnx,ipi-id
>
> Same order as 'properties'.
Ack.
>
> > +
> > +examples:
> > + - |
> > + #include<dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + amba {
>
> bus {
Ack.
> > + #address-cells = <0x2>;
> > + #size-cells = <0x2>;
> > + zynqmp-mailbox@ff300000 {
> > + compatible = "xlnx,versal-ipi-mailbox";
> > + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> > + xlnx,ipi-id = <0>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + reg = <0x0 0xff300000 0x0 0x1000>,
> > + <0x0 0xff990000 0x0 0x1ff>;
> > + reg-names = "ctrl", "msg";
> > + ranges;
> > +
> > + /* buffered IPI */
> > + mailbox@ff340000 {
> > + compatible = "xlnx,versal-ipi-dest-mailbox";
> > + reg = <0x0 0xff340000 0x0 0x1000>,
> > + <0x0 0xff990400 0x0 0x1ff>;
> > + reg-names = "ctrl", "msg";
> > + #mbox-cells = <1>;
> > + xlnx,ipi-id = <4>;
> > + };
> > +
> > + /* bufferless IPI */
> > + mailbox@ff370000 {
> > + compatible = "xlnx,versal-ipi-dest-mailbox";
> > + reg = <0x0 0xff370000 0x0 0x1000>;
> > + reg-names = "ctrl";
> > + #mbox-cells = <1>;
> > + xlnx,ipi-id = <7>;
> > + };
> > + };
> > + };
> > +
> > +...
> >
> > base-commit: 2cc14f52aeb78ce3f29677c2de1f06c0e91471ab
> > --
> > 2.25.1
> >
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-11-30 1:19 [PATCH] dt-bindings: mailbox: add Versal IPI bindings Tanmay Shah
2023-12-06 15:09 ` Rob Herring
2023-12-06 22:37 ` Tanmay Shah
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