From: Marc Kleine-Budde <mkl@pengutronix.de>
To: Conor Dooley <conor@kernel.org>
Cc: linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Wolfgang Grandegger <wg@grandegger.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-can@vger.kernel.org, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH RESEND v1 0/7] MPFS clock fixes required for correct CAN clock modeling
Date: Fri, 8 Dec 2023 18:17:54 +0100 [thread overview]
Message-ID: <20231208-atonable-cable-24ce1ceec083-mkl@pengutronix.de> (raw)
In-Reply-To: <20231208-reenter-ajar-b6223e5134b3@spud>
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On 08.12.2023 17:12:22, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Resending cos I accidentally only sent the cover letter a few minutes
> prior to this series, due to screwing up a dry run of sending.
> :clown_face:
>
> While reviewing a CAN clock driver internally for MPFS [1]
> 1 - Hopefully that'll show up on the lists soon, once we are happy with
> it ourselves.
A CAN clock driver or a complete CAN driver?
Marc
--
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Embedded Linux | https://www.pengutronix.de |
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next prev parent reply other threads:[~2023-12-08 17:18 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-08 17:12 [PATCH RESEND v1 0/7] MPFS clock fixes required for correct CAN clock modeling Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 1/7] dt-bindings: clock: mpfs: add more MSSPLL output definitions Conor Dooley
2023-12-08 17:40 ` Emil Renner Berthing
2023-12-08 19:26 ` Conor Dooley
2023-12-09 7:58 ` Krzysztof Kozlowski
2023-12-08 17:12 ` [PATCH RESEND v1 2/7] dt-bindings: can: mpfs: add missing required clock Conor Dooley
2023-12-08 18:31 ` Rob Herring
2023-12-08 19:25 ` Conor Dooley
2023-12-08 21:42 ` Rob Herring
2023-12-12 20:49 ` Marc Kleine-Budde
2023-12-13 13:02 ` Conor Dooley
2023-12-14 11:31 ` Marc Kleine-Budde
2023-12-14 13:16 ` Conor Dooley
2023-12-14 13:20 ` Marc Kleine-Budde
2023-12-08 17:12 ` [PATCH RESEND v1 3/7] clk: microchip: mpfs: split MSSPLL in two Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 4/7] clk: microchip: mpfs: setup for using other mss pll outputs Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 5/7] clk: microchip: mpfs: add missing MSSPLL outputs Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 6/7] clk: microchip: mpfs: convert MSSPLL outputs to clk_divider Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 7/7] riscv: dts: microchip: add missing CAN bus clocks Conor Dooley
2023-12-08 17:17 ` Marc Kleine-Budde [this message]
2023-12-08 17:21 ` [PATCH RESEND v1 0/7] MPFS clock fixes required for correct CAN clock modeling Conor Dooley
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