From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Luo Jie <quic_luoj@quicinc.com>
Cc: <agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <davem@davemloft.net>,
<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>, <andrew@lunn.ch>, <hkallweit1@gmail.com>,
<linux@armlinux.org.uk>, <robert.marko@sartura.hr>,
<linux-arm-msm@vger.kernel.org>, <netdev@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<quic_srichara@quicinc.com>
Subject: Re: [PATCH v2 1/5] net: mdio: ipq4019: move eth_ldo_rdy before MDIO bus register
Date: Tue, 12 Dec 2023 13:50:01 +0100 [thread overview]
Message-ID: <20231212135001.6bf40e4d@device.home> (raw)
In-Reply-To: <20231212115151.20016-2-quic_luoj@quicinc.com>
Hello,
On Tue, 12 Dec 2023 19:51:46 +0800
Luo Jie <quic_luoj@quicinc.com> wrote:
> The ethernet LDO provides the clock for the ethernet PHY that
> is connected with PCS, each LDO enables the clock output to
> each PCS, after the clock output enablement, the PHY GPIO reset
> can take effect.
>
> For the PHY taking the MDIO bus level GPIO reset, the ethernet
> LDO should be enabled before the MDIO bus register.
>
> For example, the qca8084 PHY takes the MDIO bus level GPIO
> reset for quad PHYs, there is another reason for qca8084 PHY
> using MDIO bus level GPIO reset instead of PHY level GPIO
> reset as below.
>
> The work sequence of qca8084:
> 1. enable ethernet LDO.
> 2. GPIO reset on quad PHYs.
> 3. register clock provider based on MDIO device of qca8084.
> 4. PHY probe function called for initializing common clocks.
> 5. PHY capabilities acquirement.
>
> If qca8084 takes PHY level GPIO reset in the step 4, the clock
> provider of qca8084 can't be registered correctly, since the
> clock parent(reading the current qca8084 hardware registers in
> step 3) of the registered clocks is deserted after GPIO reset.
>
> There are two PCS(UNIPHY) supported in SOC side on ipq5332,
> and three PCS(UNIPHY) supported on ipq9574.
>
> Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
> ---
[...]
> @@ -252,11 +244,32 @@ static int ipq4019_mdio_probe(struct platform_device *pdev)
> if (IS_ERR(priv->mdio_clk))
> return PTR_ERR(priv->mdio_clk);
>
> - /* The platform resource is provided on the chipset IPQ5018 */
> - /* This resource is optional */
> - res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> - if (res)
> - priv->eth_ldo_rdy = devm_ioremap_resource(&pdev->dev, res);
> + /* These platform resources are provided on the chipset IPQ5018 or
> + * IPQ5332.
> + */
> + /* This resource are optional */
> + for (index = 0; index < ETH_LDO_RDY_CNT; index++) {
> + res = platform_get_resource(pdev, IORESOURCE_MEM, index + 1);
> + if (res) {
> + priv->eth_ldo_rdy[index] = devm_ioremap(&pdev->dev,
> + res->start,
> + resource_size(res));
You can simplify that sequence by using
devm_platform_get_and_ioremap_resource(), which will do both the
platform_get_resource and the devm_ioremap at once for you.
Thanks,
Maxime
next prev parent reply other threads:[~2023-12-12 12:50 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-12 11:51 [PATCH v2 0/5] support ipq5332 platform Luo Jie
2023-12-12 11:51 ` [PATCH v2 1/5] net: mdio: ipq4019: move eth_ldo_rdy before MDIO bus register Luo Jie
2023-12-12 12:50 ` Maxime Chevallier [this message]
2023-12-12 19:11 ` Russell King (Oracle)
2023-12-13 10:07 ` Maxime Chevallier
2023-12-12 11:51 ` [PATCH v2 2/5] net: mdio: ipq4019: enable the SoC uniphy clocks for ipq5332 platform Luo Jie
2023-12-12 12:46 ` Maxime Chevallier
2023-12-13 8:05 ` Jie Luo
2023-12-12 11:51 ` [PATCH v2 3/5] net: mdio: ipq4019: configure CMN PLL clock for ipq5332 Luo Jie
2023-12-12 12:54 ` Maxime Chevallier
2023-12-12 19:12 ` Russell King (Oracle)
2023-12-13 8:09 ` Jie Luo
2023-12-13 10:08 ` Maxime Chevallier
2023-12-12 11:51 ` [PATCH v2 4/5] net: mdio: ipq4019: support MDIO clock frequency divider Luo Jie
2023-12-12 11:51 ` [PATCH v2 5/5] dt-bindings: net: ipq4019-mdio: Document ipq5332 platform Luo Jie
2023-12-12 13:24 ` Rob Herring
2023-12-12 16:06 ` Conor Dooley
2023-12-13 8:26 ` Jie Luo
2023-12-14 17:12 ` Conor Dooley
2023-12-15 6:46 ` Jie Luo
2023-12-15 7:29 ` Krzysztof Kozlowski
2023-12-15 9:49 ` Jie Luo
2023-12-15 10:19 ` Krzysztof Kozlowski
2023-12-15 10:33 ` Jie Luo
2023-12-15 10:37 ` Krzysztof Kozlowski
2023-12-15 10:40 ` Jie Luo
2023-12-15 10:53 ` Krzysztof Kozlowski
2023-12-15 11:42 ` Jie Luo
2023-12-15 12:19 ` Krzysztof Kozlowski
2023-12-15 12:40 ` Jie Luo
2023-12-15 13:39 ` Andrew Lunn
2023-12-16 13:31 ` Jie Luo
2023-12-15 13:41 ` Conor Dooley
2023-12-16 13:16 ` Jie Luo
2023-12-16 14:16 ` Conor Dooley
2023-12-16 15:37 ` Jie Luo
2023-12-19 15:47 ` Conor Dooley
2023-12-20 10:07 ` Jie Luo
2023-12-20 7:28 ` Krzysztof Kozlowski
2023-12-20 10:11 ` Jie Luo
2023-12-15 10:42 ` Conor Dooley
2023-12-15 11:42 ` Jie Luo
2023-12-12 20:06 ` Rob Herring
2023-12-13 8:42 ` Jie Luo
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