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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id r20-20020a05600c459400b0040b349c91acsm23318063wmo.16.2023.12.13.09.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 09:19:37 -0800 (PST) Date: Wed, 13 Dec 2023 18:19:37 +0100 From: Andrew Jones To: Anup Patel Cc: Paolo Bonzini , Atish Patra , Palmer Dabbelt , Paul Walmsley , Shuah Khan , Anup Patel , devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH 03/15] KVM: riscv: selftests: Add Zbc extension to get-reg-list test Message-ID: <20231213-1082f104e8ba65ee3db6aa3a@orel> References: <20231128145357.413321-1-apatel@ventanamicro.com> <20231128145357.413321-4-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231128145357.413321-4-apatel@ventanamicro.com> On Tue, Nov 28, 2023 at 08:23:45PM +0530, Anup Patel wrote: > The KVM RISC-V allows Zbc extension for Guest/VM so let us add > this extension to get-reg-list test. > > Signed-off-by: Anup Patel > --- > tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c > index b6b4b6d7dacd..4b75b011f2d8 100644 > --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c > +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c > @@ -44,6 +44,7 @@ bool filter_reg(__u64 reg) > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_SVPBMT: > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZBA: > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZBB: > + case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZBC: Assuming this gets rebased on [1] then this line becomes case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC: [1] https://lore.kernel.org/linux-riscv/20231213170951.93453-8-ajones@ventanamicro.com/ > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZBS: > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZICBOM: > case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZICBOZ: > @@ -361,6 +362,7 @@ static const char *isa_ext_id_to_str(const char *prefix, __u64 id) > KVM_ISA_EXT_ARR(SVPBMT), > KVM_ISA_EXT_ARR(ZBA), > KVM_ISA_EXT_ARR(ZBB), > + KVM_ISA_EXT_ARR(ZBC), > KVM_ISA_EXT_ARR(ZBS), > KVM_ISA_EXT_ARR(ZICBOM), > KVM_ISA_EXT_ARR(ZICBOZ), > @@ -739,6 +741,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT); > KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT); > KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA); > KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB); > +KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC); > KVM_ISA_EXT_SIMPLE_CONFIG(zbs, ZBS); > KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM); > KVM_ISA_EXT_SUBLIST_CONFIG(zicboz, ZICBOZ); > @@ -761,6 +764,7 @@ struct vcpu_reg_list *vcpu_configs[] = { > &config_svpbmt, > &config_zba, > &config_zbb, > + &config_zbc, > &config_zbs, > &config_zicbom, > &config_zicboz, > -- > 2.34.1 > Reviewed-by: Andrew Jones