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From: David Lechner <dlechner@baylibre.com>
To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org
Cc: "David Lechner" <dlechner@baylibre.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Jonathan Cameron" <jic23@kernel.org>,
	"Michael Hennerich" <michael.hennerich@analog.com>,
	"Nuno Sá" <nuno.sa@analog.com>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Mark Brown" <broonie@kernel.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 1/3] dt-bindings: spi: add spi-rx-bus-channels peripheral property
Date: Wed, 13 Dec 2023 05:21:18 -0600	[thread overview]
Message-ID: <20231213-ad7380-mainline-v2-1-cd32150d84a3@baylibre.com> (raw)
In-Reply-To: <20231213-ad7380-mainline-v2-0-cd32150d84a3@baylibre.com>

This adds a new spi-rx-bus-channels property to the generic spi
peripheral property bindings. This property is used to describe
devices that have parallel data output channels.

This property is different from spi-rx-bus-width in that the latter
means that we are reading multiple bits of a single word at one time
while the former means that we are reading single bits of multiple words
at the same time.

Signed-off-by: David Lechner <dlechner@baylibre.com>
---

v2 changes: new patch in v2

 .../devicetree/bindings/spi/spi-peripheral-props.yaml        | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
index 15938f81fdce..1c8e71c18234 100644
--- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
@@ -67,6 +67,18 @@ properties:
     enum: [0, 1, 2, 4, 8]
     default: 1
 
+  spi-rx-bus-channels:
+    description:
+      The number of parallel channels for read transfers. The difference between
+      this and spi-rx-bus-width is that a value N for spi-rx-bus-channels means
+      the SPI bus is receiving one bit each of N different words at the same
+      time whereas a value M for spi-rx-bus-width means that the bus is
+      receiving M bits of a single word at the same time. It is also possible to
+      use both properties at the same time, meaning the bus is receiving M bits
+      of N different words at the same time.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    default: 1
+
   spi-rx-delay-us:
     description:
       Delay, in microseconds, after a read transfer.

-- 
2.34.1


  reply	other threads:[~2023-12-13 11:21 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-13 11:21 [PATCH v2 0/3] iio: adc: add new ad7380 driver David Lechner
2023-12-13 11:21 ` David Lechner [this message]
2023-12-13 11:21 ` [PATCH v2 2/3] dt-bindings: iio: adc: Add binding for AD7380 ADCs David Lechner
2023-12-13 16:10   ` Conor Dooley
2023-12-13 16:11     ` Conor Dooley
2023-12-13 16:15   ` Conor Dooley
2023-12-13 11:21 ` [PATCH v2 3/3] iio: adc: ad7380: new driver " David Lechner
2023-12-13 12:18   ` Nuno Sá
2023-12-13 13:47     ` David Lechner
2023-12-13 14:07       ` Nuno Sá
2023-12-14 10:14   ` Jonathan Cameron
2023-12-14 10:33     ` David Lechner
2023-12-14 12:36       ` Jonathan Cameron
2023-12-14 15:03         ` David Lechner

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