From: Conor Dooley <conor@kernel.org>
To: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Wolfgang Grandegger <wg@grandegger.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-can@vger.kernel.org, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH RESEND v1 2/7] dt-bindings: can: mpfs: add missing required clock
Date: Thu, 14 Dec 2023 13:16:55 +0000 [thread overview]
Message-ID: <20231214-tinderbox-paver-d1ff0fc5c428@spud> (raw)
In-Reply-To: <20231214-tinderbox-glitzy-60d1936ab85f-mkl@pengutronix.de>
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On Thu, Dec 14, 2023 at 12:31:04PM +0100, Marc Kleine-Budde wrote:
> On 13.12.2023 13:02:49, Conor Dooley wrote:
> > On Tue, Dec 12, 2023 at 09:49:41PM +0100, Marc Kleine-Budde wrote:
> > > On 08.12.2023 17:12:24, Conor Dooley wrote:
> > > > From: Conor Dooley <conor.dooley@microchip.com>
> > > >
> > > > The CAN controller on PolarFire SoC has an AHB peripheral clock _and_ a
> > > > CAN bus clock. The bus clock was omitted when the binding was written,
> > > > but is required for operation. Make up for lost time and add it.
> > > >
> > > > Cautionary tale in adding bindings without having implemented a real
> > > > user for them perhaps.
> > > >
> > > > Fixes: c878d518d7b6 ("dt-bindings: can: mpfs: document the mpfs CAN controller")
> > > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > > > ---
> > > > .../devicetree/bindings/net/can/microchip,mpfs-can.yaml | 7 +++++--
> > > > 1 file changed, 5 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml b/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
> > > > index 45aa3de7cf01..05f680f15b17 100644
> > > > --- a/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
> > > > +++ b/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
> > > > @@ -24,7 +24,10 @@ properties:
> > > > maxItems: 1
> > > >
> > > > clocks:
> > > > - maxItems: 1
> > > > + maxItems: 2
> > > > + items:
> > > > + - description: AHB peripheral clock
> > > > + - description: CAN bus clock
> > >
> > > Do we we want to have a "clock-names" property, as we need the clock
> > > rate of the CAN bus clock.
> >
> > We should not need the clock-names property to be able to get both of
> > the clocks. clk_bulk_get_all() for example should be usable here.
>
> ACK, but we need the clock rate of CAN clock. Does this binding check
> that the CAN clock rate is the 2nd one?
The items list requires that the can clock be the second one, so drivers
etc can rely on that ordering.
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next prev parent reply other threads:[~2023-12-14 13:17 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-08 17:12 [PATCH RESEND v1 0/7] MPFS clock fixes required for correct CAN clock modeling Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 1/7] dt-bindings: clock: mpfs: add more MSSPLL output definitions Conor Dooley
2023-12-08 17:40 ` Emil Renner Berthing
2023-12-08 19:26 ` Conor Dooley
2023-12-09 7:58 ` Krzysztof Kozlowski
2023-12-08 17:12 ` [PATCH RESEND v1 2/7] dt-bindings: can: mpfs: add missing required clock Conor Dooley
2023-12-08 18:31 ` Rob Herring
2023-12-08 19:25 ` Conor Dooley
2023-12-08 21:42 ` Rob Herring
2023-12-12 20:49 ` Marc Kleine-Budde
2023-12-13 13:02 ` Conor Dooley
2023-12-14 11:31 ` Marc Kleine-Budde
2023-12-14 13:16 ` Conor Dooley [this message]
2023-12-14 13:20 ` Marc Kleine-Budde
2023-12-08 17:12 ` [PATCH RESEND v1 3/7] clk: microchip: mpfs: split MSSPLL in two Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 4/7] clk: microchip: mpfs: setup for using other mss pll outputs Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 5/7] clk: microchip: mpfs: add missing MSSPLL outputs Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 6/7] clk: microchip: mpfs: convert MSSPLL outputs to clk_divider Conor Dooley
2023-12-08 17:12 ` [PATCH RESEND v1 7/7] riscv: dts: microchip: add missing CAN bus clocks Conor Dooley
2023-12-08 17:17 ` [PATCH RESEND v1 0/7] MPFS clock fixes required for correct CAN clock modeling Marc Kleine-Budde
2023-12-08 17:21 ` Conor Dooley
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