From: Praveenkumar I <quic_ipkumar@quicinc.com>
To: <agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<bhelgaas@google.com>, <lpieralisi@kernel.org>, <kw@linux.com>,
<vkoul@kernel.org>, <kishon@kernel.org>, <mani@kernel.org>,
<quic_nsekar@quicinc.com>, <quic_srichara@quicinc.com>,
<linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <linux-phy@lists.infradead.org>
Cc: <quic_varada@quicinc.com>, <quic_devipriy@quicinc.com>,
<quic_kathirav@quicinc.com>, <quic_anusha@quicinc.com>
Subject: [PATCH 07/10] dt-bindings: PCI: qcom: Add IPQ5332 SoC
Date: Thu, 14 Dec 2023 11:58:44 +0530 [thread overview]
Message-ID: <20231214062847.2215542-8-quic_ipkumar@quicinc.com> (raw)
In-Reply-To: <20231214062847.2215542-1-quic_ipkumar@quicinc.com>
Add support for the PCIe controller on the Qualcomm
IPQ5332 SoC to the bindings.
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
.../devicetree/bindings/pci/qcom,pcie.yaml | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index eadba38171e1..af5e67d2a984 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -21,6 +21,7 @@ properties:
- qcom,pcie-apq8064
- qcom,pcie-apq8084
- qcom,pcie-ipq4019
+ - qcom,pcie-ipq5332
- qcom,pcie-ipq6018
- qcom,pcie-ipq8064
- qcom,pcie-ipq8064-v2
@@ -170,6 +171,7 @@ allOf:
compatible:
contains:
enum:
+ - qcom,pcie-ipq5332
- qcom,pcie-ipq6018
- qcom,pcie-ipq8074-gen3
then:
@@ -332,6 +334,39 @@ allOf:
- const: ahb # AHB reset
- const: phy_ahb # PHY AHB reset
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-ipq5332
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ maxItems: 6
+ clock-names:
+ items:
+ - const: ahb # AHB clock
+ - const: aux # Auxiliary clock
+ - const: axi_m # AXI Master clock
+ - const: axi_s # AXI Slave clock
+ - const: axi_bridge # AXI bridge clock
+ - const: rchng
+ resets:
+ minItems: 8
+ maxItems: 8
+ reset-names:
+ items:
+ - const: pipe # PIPE reset
+ - const: sticky # Core sticky reset
+ - const: axi_m_sticky # AXI master sticky reset
+ - const: axi_m # AXI master reset
+ - const: axi_s_sticky # AXI slave sticky reset
+ - const: axi_s # AXI slave reset
+ - const: ahb # AHB reset
+ - const: aux # AUX reset
+
- if:
properties:
compatible:
@@ -790,6 +825,7 @@ allOf:
enum:
- qcom,pcie-apq8064
- qcom,pcie-ipq4019
+ - qcom,pcie-ipq5332
- qcom,pcie-ipq8064
- qcom,pcie-ipq8064v2
- qcom,pcie-ipq8074
--
2.34.1
next prev parent reply other threads:[~2023-12-14 6:30 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-14 6:28 [PATCH 00/10] Add PCIe support for Qualcomm IPQ5332 Praveenkumar I
2023-12-14 6:28 ` [PATCH 01/10] dt-bindings: clock: Add separate clocks for PCIe and USB for Combo PHY Praveenkumar I
2023-12-15 8:28 ` Krzysztof Kozlowski
2023-12-14 6:28 ` [PATCH 02/10] clk: qcom: ipq5332: " Praveenkumar I
2023-12-14 7:09 ` Dmitry Baryshkov
2023-12-15 5:44 ` Praveenkumar I
2023-12-15 10:38 ` Dmitry Baryshkov
2023-12-14 6:28 ` [PATCH 03/10] arm64: dts: qcom: ipq5332: Add separate entry for USB pipe clock Praveenkumar I
2023-12-14 7:21 ` Dmitry Baryshkov
2023-12-15 5:58 ` Praveenkumar I
2023-12-14 6:28 ` [PATCH 04/10] phy: qcom: Add support for Pipe clock rate from device data Praveenkumar I
2023-12-14 7:12 ` Dmitry Baryshkov
2023-12-14 6:28 ` [PATCH 05/10] dt-bindings: phy: qcom,uniphy-pcie: Add ipq5332 bindings Praveenkumar I
2023-12-15 8:31 ` Krzysztof Kozlowski
2023-12-14 6:28 ` [PATCH 06/10] phy: qcom: ipq5332: Add support for g3x1 and g3x2 PCIe PHYs Praveenkumar I
2023-12-14 7:12 ` Dmitry Baryshkov
2023-12-15 5:45 ` Praveenkumar I
2023-12-14 6:28 ` Praveenkumar I [this message]
2023-12-14 7:15 ` [PATCH 07/10] dt-bindings: PCI: qcom: Add IPQ5332 SoC Dmitry Baryshkov
2023-12-15 5:52 ` Praveenkumar I
2023-12-15 8:35 ` Krzysztof Kozlowski
2023-12-14 6:28 ` [PATCH 08/10] pci: qcom: Add support for IPQ5332 Praveenkumar I
2023-12-14 7:20 ` Dmitry Baryshkov
2023-12-14 6:28 ` [PATCH 09/10] arm64: dts: qcom: ipq5332: Add PCIe related nodes Praveenkumar I
2023-12-15 8:36 ` Krzysztof Kozlowski
2023-12-14 6:28 ` [PATCH 10/10] arm64: dts: qcom: ipq5332: Enable PCIe phys and controllers Praveenkumar I
2024-03-10 13:29 ` [PATCH 00/10] Add PCIe support for Qualcomm IPQ5332 Manivannan Sadhasivam
2024-11-15 10:04 ` Sricharan Ramabadhran
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231214062847.2215542-8-quic_ipkumar@quicinc.com \
--to=quic_ipkumar@quicinc.com \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=mturquette@baylibre.com \
--cc=quic_anusha@quicinc.com \
--cc=quic_devipriy@quicinc.com \
--cc=quic_kathirav@quicinc.com \
--cc=quic_nsekar@quicinc.com \
--cc=quic_srichara@quicinc.com \
--cc=quic_varada@quicinc.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).