From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
To: <cros-qcom-dts-watchers@chromium.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Prasad Malisetty <pmaliset@codeaurora.org>,
"Stephen Boyd" <swboyd@chromium.org>
Cc: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <quic_vbadigan@quicinc.com>,
<quic_ramkri@quicinc.com>, <quic_nitegupt@quicinc.com>,
<quic_skananth@quicinc.com>, <quic_parass@quicinc.com>,
<stable@vger.kernel.org>,
Krishna chaitanya chundru <quic_krichai@quicinc.com>
Subject: [PATCH] arm64: dts: qcom: sc7280: Add additional MSI interrupts
Date: Mon, 18 Dec 2023 19:32:36 +0530 [thread overview]
Message-ID: <20231218-additional_msi-v1-1-de6917392684@quicinc.com> (raw)
Current MSI's mapping doesn't have all the vectors. This platform
supports 8 vectors each vector supports 32 MSI's, so total MSI's
supported is 256.
Add all the MSI groups supported for this PCIe instance in this platform.
Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes")
cc: stable@vger.kernel.org
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 66f1eb83cca7..e1dc41705f61 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2146,8 +2146,16 @@ pcie1: pci@1c08000 {
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi0", "msi1", "msi2", "msi3",
+ "msi4", "msi5", "msi6", "msi7";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
---
base-commit: 5bd7ef53ffe5ca580e93e74eb8c81ed191ddc4bd
change-id: 20231218-additional_msi-6062dc812c29
Best regards,
--
Krishna chaitanya chundru <quic_krichai@quicinc.com>
next reply other threads:[~2023-12-18 14:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-18 14:02 Krishna chaitanya chundru [this message]
2024-01-27 22:34 ` [PATCH] arm64: dts: qcom: sc7280: Add additional MSI interrupts Bjorn Andersson
[not found] <20231218-additional_msi-v1-1-c872ce861a97@quicinc.com>
2024-01-04 8:44 ` Krishna Chaitanya Chundru
2024-01-04 8:49 ` Krzysztof Kozlowski
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