From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 116FC3D566; Mon, 18 Dec 2023 15:53:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C60E92F4; Mon, 18 Dec 2023 07:54:37 -0800 (PST) Received: from donnerap.manchester.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B004F3F5A1; Mon, 18 Dec 2023 07:53:50 -0800 (PST) Date: Mon, 18 Dec 2023 15:53:45 +0000 From: Andre Przywara To: Conor Dooley Cc: Brandon Cheo Fusi , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Maxime Ripard , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v2 3/5] cpufreq: sun50i: Add D1 support Message-ID: <20231218155345.476e71ea@donnerap.manchester.arm.com> In-Reply-To: <20231218-blabber-slapstick-ab7ae45af019@spud> References: <20231218110543.64044-1-fusibrandon13@gmail.com> <20231218110543.64044-4-fusibrandon13@gmail.com> <20231218-blabber-slapstick-ab7ae45af019@spud> Organization: ARM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Mon, 18 Dec 2023 14:55:30 +0000 Conor Dooley wrote: Hi, > On Mon, Dec 18, 2023 at 12:05:41PM +0100, Brandon Cheo Fusi wrote: > > Add support for D1 based devices to the Allwinner H6 cpufreq > > driver > > > > Signed-off-by: Brandon Cheo Fusi > > --- > > drivers/cpufreq/sun50i-cpufreq-nvmem.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c > > index 32a9c88f8..ccf83780f 100644 > > --- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c > > +++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c > > @@ -160,6 +160,7 @@ static struct platform_driver sun50i_cpufreq_driver = { > > > > static const struct of_device_id sun50i_cpufreq_match_list[] = { > > { .compatible = "allwinner,sun50i-h6" }, > > + { .compatible = "allwinner,sun20i-d1" }, > > I thought the feedback in v2 was to drop this change, since the > devicetree has the sun50i-h6 as a fallback compatible? Well, this is the *board* (fallback) compatible string, so we cannot assign it as we like. The whole (existing) scheme is admittedly somewhat weird, because we not only match on a particular device compatible (like allwinner,sun20i-d1-operating-points), but also need to blocklist and re-match some parts against the *board compatible*, owing to the cpufreq-dt driver. The board name is basically used as a placeholder to find out the SoC, because there is (or was?) no other good way - the CPU DT nodes don't work for this. Back when this was introduced, this was the "least worst" solution. I don't remember all the details, and didn't find time yet to look into this in more detail, but fixing this is non-trivial. If this isn't 6.8 material, I might have a look at this later this week/month. Cheers, Andre