[PATCH v6 09/16] dt-bindings: riscv: Add T-Head PMU extension description

Yu Chien Peter Lin
2023-12-25T10:49:18Z

Document the ISA string for T-Head performance monitor extension
which provides counter overflow interrupt mechanism.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Changes v2 -> v3:
- New patch
Changes v3 -> v4:
- No change
Changes v4 -> v5:
- Include Guo's Reviewed-by
- Include Inochi's Reviewed-by
- Update to C910 documentation with its commit hash
Changes v5 -> v6:
- Include Conor's Acked-by
---
Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index c91ab0e46648..b5cb8ac7ac80 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -258,5 +258,11 @@ properties:
in commit 2e5236 ("Ztso is now ratified.") of the
riscv-isa-manual.

+ - const: xtheadpmu
+ description:
+ The T-Head performance monitor extension for counter overflow, as ratified
+ in commit 4c4981 ("Initial commit") of Xuantie C910 user manual.
+ https://github.com/T-head-Semi/openc910/tree/main/doc
+
additionalProperties: true
...
--
2.34.1