From: Shengyang Chen <shengyang.chen@starfivetech.com>
To: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org
Cc: andrzej.hajda@intel.com, neil.armstrong@linaro.org,
rfoss@kernel.org, Laurent.pinchart@ideasonboard.com,
jonas@kwiboo.se, jernej.skrabec@gmail.com,
maarten.lankhorst@linux.intel.com, mripard@kernel.org,
tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, p.zabel@pengutronix.de,
tomi.valkeinen@ideasonboard.com, r-ravikumar@ti.com,
aford173@gmail.com, rdunlap@infradead.org,
u.kleine-koenig@pengutronix.de, bbrezillon@kernel.org,
changhuang.liang@starfivetech.com, keith.zhao@starfivetech.com,
shengyang.chen@starfivetech.com, jack.zhu@starfivetech.com,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 1/2] dt-bindings: display: bridge: cdns: Add properties to support StarFive JH7110 SoC
Date: Tue, 9 Jan 2024 15:25:15 +0800 [thread overview]
Message-ID: <20240109072516.24328-2-shengyang.chen@starfivetech.com> (raw)
In-Reply-To: <20240109072516.24328-1-shengyang.chen@starfivetech.com>
From: Keith Zhao <keith.zhao@starfivetech.com>
Add properties in CDNS DSI yaml file to match with
CDNS DSI module in StarFive JH7110 SoC.
Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
---
.../bindings/display/bridge/cdns,dsi.yaml | 44 ++++++++++++++++++-
1 file changed, 42 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
index 23060324d16e..da091e105794 100644
--- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
@@ -16,6 +16,7 @@ properties:
compatible:
enum:
- cdns,dsi
+ - starfve,jh7110-dsi
- ti,j721e-dsi
reg:
@@ -27,14 +28,20 @@ properties:
Register block for wrapper settings registers in case of TI J7 SoCs.
clocks:
+ minItems: 2
items:
- description: PSM clock, used by the IP
- description: sys clock, used by the IP
+ - description: apb clock, used by the IP
+ - description: txesc clock, used by the IP
clock-names:
+ minItems: 2
items:
- const: dsi_p_clk
- const: dsi_sys_clk
+ - const: apb
+ - const: txesc
phys:
maxItems: 1
@@ -46,10 +53,21 @@ properties:
maxItems: 1
resets:
- maxItems: 1
+ minItems: 1
+ items:
+ - description: dsi sys reset line
+ - description: dsi dpi reset line
+ - description: dsi apb reset line
+ - description: dsi txesc reset line
+ - description: dsi txbytehs reset line
reset-names:
- const: dsi_p_rst
+ items:
+ - const: dsi_p_rst
+ - const: dpi
+ - const: apb
+ - const: txesc
+ - const: txbytehs
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -90,6 +108,28 @@ allOf:
reg:
maxItems: 1
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh7110-dsi
+ then:
+ properties:
+ clocks:
+ minItems: 4
+ maxItems: 4
+ resets:
+ minItems: 5
+ maxItems: 5
+ required:
+ - reset-names
+ else:
+ properties:
+ clocks:
+ maxItems: 2
+ resets:
+ maxItems: 1
+
required:
- compatible
- reg
--
2.17.1
next prev parent reply other threads:[~2024-01-09 7:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-09 7:25 [PATCH v2 0/2] Add StarFive JH7110 SoC DSI support Shengyang Chen
2024-01-09 7:25 ` Shengyang Chen [this message]
2024-01-10 21:06 ` [PATCH v2 1/2] dt-bindings: display: bridge: cdns: Add properties to support StarFive JH7110 SoC Krzysztof Kozlowski
2024-01-16 8:46 ` Shengyang Chen
2024-01-09 7:25 ` [PATCH v2 2/2] gpu: drm: bridge: cadence: Add a driver and platform ops for " Shengyang Chen
2024-01-09 9:07 ` Philipp Zabel
2024-01-16 8:40 ` Shengyang Chen
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