From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A97A63B195; Tue, 9 Jan 2024 17:18:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XCcR/f1H" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 41427C433F1; Tue, 9 Jan 2024 17:18:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1704820693; bh=rTSF6jHsJ5Bms5qWgXfRjwBeSbdqBmaf+xJbPhMtxXo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=XCcR/f1HpwXjBL3+JzDA3cYTWF4cOKjY4w2ed/u5jR++Bs8BN5zPVONS9Q3+PnPAb pb8PKJO4yb/0nUsPYFDSmdRKvGurUE4/MCJvQiijN9vQFLmbMRXGMvUPl4HAGVQWYA QMBFEAoIMTyJHlknhQ5ZEGIG0QTdPO6ncBWSdQ4XwKZOT1mQAM2uaRusNY9o4FbI8x zdGZxJ0bgaKbALZMhjViShPBo6gwQTkPiNGEvWgjPt3etYDhvJqaij2AjavyN1IHts XuYqWl2YWLiREDZ+ZVW2lbnzZTn9WzxSx6IbGlHfgv0g8oahfXZYkod5O5B9LIQ8rK y6arbFMfhluYA== Received: (nullmailer pid 2791151 invoked by uid 1000); Tue, 09 Jan 2024 17:18:07 -0000 Date: Tue, 9 Jan 2024 11:18:07 -0600 From: Rob Herring To: Yoshinori Sato Cc: linux-sh@vger.kernel.org, Damien Le Moal , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Thomas Gleixner , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Yang Xiwen , Sebastian Reichel , Linus Walleij , Randy Dunlap , Arnd Bergmann , Vlastimil Babka , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Azeem Shaikh , Javier Martinez Canillas , Max Filippov , Palmer Dabbelt , Bin Meng , Jonathan Corbet , Jacky Huang , Lukas Bulwahn , Biju Das , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Sam Ravnborg , Sergey Shtylyov , Michael Karcher , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: Re: [DO NOT MERGE v6 19/37] dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: Add json-schema Message-ID: <20240109171807.GA2783042-robh@kernel.org> References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, Jan 09, 2024 at 05:23:16PM +0900, Yoshinori Sato wrote: > Renesas SH7751 external interrupt encoder json-schema. > > Signed-off-by: Yoshinori Sato > --- > .../renesas,sh7751-irl-ext.yaml | 72 +++++++++++++++++++ > 1 file changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml > new file mode 100644 > index 000000000000..541b582b94ce > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl-ext.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas SH7751 external interrupt encoder with enable regs. > + > +maintainers: > + - Yoshinori Sato > + > +description: > + This is the generally used external interrupt encoder on SH7751 based boards. > + > +properties: > + compatible: > + items: > + - const: renesas,sh7751-irl-ext > + > + reg: true Must define how many entries and what they are if more than one. > + > + interrupt-controller: true > + > + '#interrupt-cells': > + const: 1 > + > + '#address-cells': > + const: 0 > + > + renesas,set-to-disable: > + $ref: /schemas/types.yaml#/definitions/flag > + description: Invert enable registers. Setting the bit to 0 enables interrupts. Why is this a property? Does it change per board or instance? If not, it should be implied by compatible. > + > + renesas,enable-bit: > + $ref: /schemas/types.yaml#/definitions/uint32-matrix > + description: | > + IRQ enable register bit mapping > + 1st word interrupt level > + 2nd word bit index of enable register Same question here. If it remains, then you need: items: items: - description: interrupt level (does that mean high/low?) - description: bit index of enable register Plus any constraints on the values if possible. > + > +required: > + - compatible > + - reg > + - interrupt-controller > + - '#interrupt-cells' > + - renesas,enable-bit > + > +additionalProperties: false > + > +examples: > + - | > + r2dintc: sh7751irl_encoder@a4000000 { interrupt-controller@a4000000 { > + compatible = "renesas,sh7751-irl-ext"; > + reg = <0xa4000000 0x02>; > + interrupt-controller; > + #address-cells = <0>; > + #size-cells = <0>; > + #interrupt-cells = <1>; > + renesas,enable-bit = <0 11>, /* PCI INTD */ > + <1 9>, /* CF IDE */ > + <2 8>, /* CF CD */ > + <3 12>, /* PCI INTC */ > + <4 10>, /* SM501 */ > + <5 6>, /* KEY */ > + <6 5>, /* RTC ALARM */ > + <7 4>, /* RTC T */ > + <8 7>, /* SDCARD */ > + <9 14>, /* PCI INTA */ > + <10 13>, /* PCI INTB */ > + <11 0>, /* EXT */ > + <12 15>; /* TP */ Looks like 'interrupt level' is just the index of the values? Why not make this an array? Rob