[PATCH 00/11] Device tree support for Imagination Series5 GPU

[PATCH 00/11] Device tree support for Imagination Series5 GPU

[Andrew Davis]

Hello all,

I know this has been tried before[0], but given the recent upstreaming of
the Series6+ GPU bindings I figured it might be time to give the Series5
bindings another try.

While there is currently no mainline driver for these binding, there is an
open source out-of-tree kernel-side driver available[1]. Having a stable
and upstream binding for these devices allows us to describe this hardware
in device tree.

This is my vision for how these bindings should look, along with some
example uses in several SoC DT files. The compatible names have been
updated to match what was decided on for Series6+, but otherwise most
is the same as we have been using in our vendor tree for many years.

Thanks,
Andrew

Based on next-20240109.

[0]: https://lkml.org/lkml/2020/4/24/1222
[1]: https://github.com/openpvrsgx-devgroup

Changes for v1:
 - Added commit message to patch #1
 - Reworked Rogue binding title
 - Add TI copyright to new binding doc
 - Added default min/maxItems to clocks property
 - Moved "additionalProperties" to end
 - Flattened out allOf block logic
 - Added extra SGX binding example
 - Added Suggested/Reviewed tags

Changes for RFC v2:
 - Added patch to rename Rogue+ binding to img,powervr-rogue.yaml
 - Locked all property item counts
 - Removed nodename pattern check

Andrew Davis (11):
  dt-bindings: gpu: Rename img,powervr to img,powervr-rogue
  dt-bindings: gpu: Add PowerVR Series5 SGX GPUs
  ARM: dts: omap3: Add device tree entry for SGX GPU
  ARM: dts: omap4: Add device tree entry for SGX GPU
  ARM: dts: omap5: Add device tree entry for SGX GPU
  ARM: dts: AM33xx: Add device tree entry for SGX GPU
  ARM: dts: AM437x: Add device tree entry for SGX GPU
  ARM: dts: DRA7xx: Add device tree entry for SGX GPU
  arm64: dts: ti: k3-am654-main: Add device tree entry for SGX GPU
  ARM: dts: sun6i: Add device tree entry for SGX GPU
  MIPS: DTS: jz4780: Add device tree entry for SGX GPU

 ...mg,powervr.yaml => img,powervr-rogue.yaml} |   4 +-
 .../bindings/gpu/img,powervr-sgx.yaml         | 138 ++++++++++++++++++
 MAINTAINERS                                   |   3 +-
 arch/arm/boot/dts/allwinner/sun6i-a31.dtsi    |   9 ++
 arch/arm/boot/dts/ti/omap/am33xx.dtsi         |   9 +-
 arch/arm/boot/dts/ti/omap/am3517.dtsi         |  11 +-
 arch/arm/boot/dts/ti/omap/am4372.dtsi         |   6 +
 arch/arm/boot/dts/ti/omap/dra7.dtsi           |   9 +-
 arch/arm/boot/dts/ti/omap/omap34xx.dtsi       |  11 +-
 arch/arm/boot/dts/ti/omap/omap36xx.dtsi       |   9 +-
 arch/arm/boot/dts/ti/omap/omap4.dtsi          |   9 +-
 arch/arm/boot/dts/ti/omap/omap5.dtsi          |   9 +-
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi      |   7 +
 arch/mips/boot/dts/ingenic/jz4780.dtsi        |  11 ++
 14 files changed, 215 insertions(+), 30 deletions(-)
 rename Documentation/devicetree/bindings/gpu/{img,powervr.yaml => img,powervr-rogue.yaml} (91%)
 create mode 100644 Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml

-- 
2.39.2

[PATCH 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue

[Andrew Davis]

This binding will be used for GPUs starting from Series6 (Rogue)
and later. A different binding document will describe Series5.
With that the name "img,powervr" is too generic, rename to
"img,powervr-rogue" to avoid confusion.

Suggested-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
---
 .../bindings/gpu/{img,powervr.yaml => img,powervr-rogue.yaml} | 4 ++--
 MAINTAINERS                                                   | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)
 rename Documentation/devicetree/bindings/gpu/{img,powervr.yaml => img,powervr-rogue.yaml} (91%)

diff --git a/Documentation/devicetree/bindings/gpu/img,powervr.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
similarity index 91%
rename from Documentation/devicetree/bindings/gpu/img,powervr.yaml
rename to Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
index a13298f1a1827..256e252f8087f 100644
--- a/Documentation/devicetree/bindings/gpu/img,powervr.yaml
+++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
@@ -2,10 +2,10 @@
 # Copyright (c) 2023 Imagination Technologies Ltd.
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/gpu/img,powervr.yaml#
+$id: http://devicetree.org/schemas/gpu/img,powervr-rogue.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Imagination Technologies PowerVR and IMG GPU
+title: Imagination Technologies PowerVR and IMG Rogue GPUs
 
 maintainers:
   - Frank Binns <frank.binns@imgtec.com>
diff --git a/MAINTAINERS b/MAINTAINERS
index bcacd665f2594..2a4e8d2c69c40 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10468,7 +10468,7 @@ M:	Donald Robson <donald.robson@imgtec.com>
 M:	Matt Coster <matt.coster@imgtec.com>
 S:	Supported
 T:	git git://anongit.freedesktop.org/drm/drm-misc
-F:	Documentation/devicetree/bindings/gpu/img,powervr.yaml
+F:	Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
 F:	Documentation/gpu/imagination/
 F:	drivers/gpu/drm/imagination/
 F:	include/uapi/drm/pvr_drm.h
-- 
2.39.2

Re: [PATCH 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue

[Krzysztof Kozlowski]

On 09/01/2024 18:19, Andrew Davis wrote:
> This binding will be used for GPUs starting from Series6 (Rogue)
> and later. A different binding document will describe Series5.
> With that the name "img,powervr" is too generic, rename to
> "img,powervr-rogue" to avoid confusion.
> 
> Suggested-by: Maxime Ripard <mripard@kernel.org>
> Signed-off-by: Andrew Davis <afd@ti.com>
> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
> Reviewed-by: Frank Binns <frank.binns@imgtec.com>
> ---

Why do you send new version while we still talk about previous?

Please implement feedback from v1 (and this is v2, so next is v3) or
keep discussing.

Best regards,
Krzysztof

Re: [PATCH 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue

[Andrew Davis]

On 1/9/24 12:59 PM, Krzysztof Kozlowski wrote:
> On 09/01/2024 18:19, Andrew Davis wrote:
>> This binding will be used for GPUs starting from Series6 (Rogue)
>> and later. A different binding document will describe Series5.
>> With that the name "img,powervr" is too generic, rename to
>> "img,powervr-rogue" to avoid confusion.
>>
>> Suggested-by: Maxime Ripard <mripard@kernel.org>
>> Signed-off-by: Andrew Davis <afd@ti.com>
>> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
>> Reviewed-by: Frank Binns <frank.binns@imgtec.com>
>> ---
> 
> Why do you send new version while we still talk about previous?
> 
> Please implement feedback from v1 (and this is v2, so next is v3) or
> keep discussing.
> 

I agreed with everything you said in the last round (RFC v2) and
made all requested changes. Did I miss something in this version?

Thanks,
Andrew

> Best regards,
> Krzysztof
> 

Re: [PATCH 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue

[Krzysztof Kozlowski]

On 09/01/2024 20:04, Andrew Davis wrote:
> On 1/9/24 12:59 PM, Krzysztof Kozlowski wrote:
>> On 09/01/2024 18:19, Andrew Davis wrote:
>>> This binding will be used for GPUs starting from Series6 (Rogue)
>>> and later. A different binding document will describe Series5.
>>> With that the name "img,powervr" is too generic, rename to
>>> "img,powervr-rogue" to avoid confusion.
>>>
>>> Suggested-by: Maxime Ripard <mripard@kernel.org>
>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
>>> Reviewed-by: Frank Binns <frank.binns@imgtec.com>
>>> ---
>>
>> Why do you send new version while we still talk about previous?
>>
>> Please implement feedback from v1 (and this is v2, so next is v3) or
>> keep discussing.
>>
> 
> I agreed with everything you said in the last round (RFC v2) and
> made all requested changes. Did I miss something in this version?

The recommendation is that naming of the file matches generic compatible
and your file has only one generic compatible. Therefore I don't
understand why you claimed there are multiple compatibles.

Best regards,
Krzysztof

Re: [PATCH 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue

[Andrew Davis]

On 1/9/24 1:17 PM, Krzysztof Kozlowski wrote:
> On 09/01/2024 20:04, Andrew Davis wrote:
>> On 1/9/24 12:59 PM, Krzysztof Kozlowski wrote:
>>> On 09/01/2024 18:19, Andrew Davis wrote:
>>>> This binding will be used for GPUs starting from Series6 (Rogue)
>>>> and later. A different binding document will describe Series5.
>>>> With that the name "img,powervr" is too generic, rename to
>>>> "img,powervr-rogue" to avoid confusion.
>>>>
>>>> Suggested-by: Maxime Ripard <mripard@kernel.org>
>>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>>> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
>>>> Reviewed-by: Frank Binns <frank.binns@imgtec.com>
>>>> ---
>>>
>>> Why do you send new version while we still talk about previous?
>>>
>>> Please implement feedback from v1 (and this is v2, so next is v3) or
>>> keep discussing.
>>>
>>
>> I agreed with everything you said in the last round (RFC v2) and
>> made all requested changes. Did I miss something in this version?
> 
> The recommendation is that naming of the file matches generic compatible
> and your file has only one generic compatible. Therefore I don't
> understand why you claimed there are multiple compatibles.
> 

I said "There are (or will be) multiple compatible strings", the rest
are on the way. So I didn't want to make this file less generic when
other bindings are almost ready.

Frank, can you help here, I'm assuming you have "img,img-bxs" and
"img,img-8xe" bindings staged for upstreaming somewhere; you'll be
putting those in this same file, right?

Thanks,
Andrew

> Best regards,
> Krzysztof
> 

Re: [PATCH 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue

[Krzysztof Kozlowski]

On 09/01/2024 20:33, Andrew Davis wrote:
> On 1/9/24 1:17 PM, Krzysztof Kozlowski wrote:
>> On 09/01/2024 20:04, Andrew Davis wrote:
>>> On 1/9/24 12:59 PM, Krzysztof Kozlowski wrote:
>>>> On 09/01/2024 18:19, Andrew Davis wrote:
>>>>> This binding will be used for GPUs starting from Series6 (Rogue)
>>>>> and later. A different binding document will describe Series5.
>>>>> With that the name "img,powervr" is too generic, rename to
>>>>> "img,powervr-rogue" to avoid confusion.
>>>>>
>>>>> Suggested-by: Maxime Ripard <mripard@kernel.org>
>>>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>>>> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
>>>>> Reviewed-by: Frank Binns <frank.binns@imgtec.com>
>>>>> ---
>>>>
>>>> Why do you send new version while we still talk about previous?
>>>>
>>>> Please implement feedback from v1 (and this is v2, so next is v3) or
>>>> keep discussing.
>>>>
>>>
>>> I agreed with everything you said in the last round (RFC v2) and
>>> made all requested changes. Did I miss something in this version?
>>
>> The recommendation is that naming of the file matches generic compatible
>> and your file has only one generic compatible. Therefore I don't
>> understand why you claimed there are multiple compatibles.
>>
> 
> I said "There are (or will be) multiple compatible strings", the rest

OK.

> are on the way. So I didn't want to make this file less generic when
> other bindings are almost ready.
> 
> Frank, can you help here, I'm assuming you have "img,img-bxs" and
> "img,img-8xe" bindings staged for upstreaming somewhere; you'll be
> putting those in this same file, right?
> 

That's fine then.

Best regards,
Krzysztof

Re: [PATCH 01/11] dt-bindings: gpu: Rename img,powervr to img,powervr-rogue

[Krzysztof Kozlowski]

On 09/01/2024 18:19, Andrew Davis wrote:
> This binding will be used for GPUs starting from Series6 (Rogue)
> and later. A different binding document will describe Series5.
> With that the name "img,powervr" is too generic, rename to
> "img,powervr-rogue" to avoid confusion.
> 
> Suggested-by: Maxime Ripard <mripard@kernel.org>
> Signed-off-by: Andrew Davis <afd@ti.com>
> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
> Reviewed-by: Frank Binns <frank.binns@imgtec.com>

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs

[Andrew Davis]

The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
multiple vendors. Describe how the SGX GPU is integrated in these SoC,
including register space and interrupts. Clocks, reset, and power domain
information is SoC specific.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 .../bindings/gpu/img,powervr-sgx.yaml         | 138 ++++++++++++++++++
 MAINTAINERS                                   |   1 +
 2 files changed, 139 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml

diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
new file mode 100644
index 0000000000000..f5898b04381cb
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
@@ -0,0 +1,138 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2023 Imagination Technologies Ltd.
+# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/img,powervr-sgx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Imagination Technologies PowerVR SGX GPUs
+
+maintainers:
+  - Frank Binns <frank.binns@imgtec.com>
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - ti,omap3430-gpu # Rev 121
+              - ti,omap3630-gpu # Rev 125
+          - const: img,powervr-sgx530
+      - items:
+          - enum:
+              - ingenic,jz4780-gpu # Rev 130
+              - ti,omap4430-gpu # Rev 120
+          - const: img,powervr-sgx540
+      - items:
+          - enum:
+              - allwinner,sun6i-a31-gpu # MP2 Rev 115
+              - ti,omap4470-gpu # MP1 Rev 112
+              - ti,omap5432-gpu # MP2 Rev 105
+              - ti,am5728-gpu # MP2 Rev 116
+              - ti,am6548-gpu # MP1 Rev 117
+          - const: img,powervr-sgx544
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    maxItems: 3
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: core
+      - const: mem
+      - const: sys
+
+  power-domains:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: ti,am6548-gpu
+    then:
+      required:
+        - power-domains
+    else:
+      properties:
+        power-domains: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - allwinner,sun6i-a31-gpu
+              - ingenic,jz4780-gpu
+    then:
+      required:
+        - clocks
+        - clock-names
+    else:
+      properties:
+        clocks: false
+        clock-names: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: allwinner,sun6i-a31-gpu
+    then:
+      properties:
+        clocks:
+          minItems: 2
+          maxItems: 2
+        clock-names:
+          minItems: 2
+          maxItems: 2
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: ingenic,jz4780-gpu
+    then:
+      properties:
+        clocks:
+          maxItems: 1
+        clock-names:
+          maxItems: 1
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/soc/ti,sci_pm_domain.h>
+
+    gpu@7000000 {
+        compatible = "ti,am6548-gpu", "img,powervr-sgx544";
+        reg = <0x7000000 0x10000>;
+        interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+        power-domains = <&k3_pds 65 TI_SCI_PD_EXCLUSIVE>;
+    };
+
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    gpu: gpu@1c40000 {
+        compatible = "allwinner,sun6i-a31-gpu", "img,powervr-sgx544";
+        reg = <0x01c40000 0x10000>;
+        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&ccu 1>, <&ccu 2>;
+        clock-names = "core", "mem";
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 2a4e8d2c69c40..b8b3aab5dd490 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10469,6 +10469,7 @@ M:	Matt Coster <matt.coster@imgtec.com>
 S:	Supported
 T:	git git://anongit.freedesktop.org/drm/drm-misc
 F:	Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
+F:	Documentation/devicetree/bindings/gpu/img,powervr-sgx.yaml
 F:	Documentation/gpu/imagination/
 F:	drivers/gpu/drm/imagination/
 F:	include/uapi/drm/pvr_drm.h
-- 
2.39.2

Re: [PATCH 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs

[Krzysztof Kozlowski]

On 09/01/2024 18:19, Andrew Davis wrote:
> The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
> multiple vendors. Describe how the SGX GPU is integrated in these SoC,
> including register space and interrupts. Clocks, reset, and power domain
> information is SoC specific.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>


> +  clock-names:
> +    minItems: 1
> +    items:
> +      - const: core
> +      - const: mem
> +      - const: sys

There are no devices currently using third clock, but I assume it is
expected or possible.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs

[Tony Lindgren]

* Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [240109 19:53]:
> On 09/01/2024 18:19, Andrew Davis wrote:
> > The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
> > multiple vendors. Describe how the SGX GPU is integrated in these SoC,
> > including register space and interrupts. Clocks, reset, and power domain
> > information is SoC specific.
> > 
> > Signed-off-by: Andrew Davis <afd@ti.com>
> > Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
> 
> 
> > +  clock-names:
> > +    minItems: 1
> > +    items:
> > +      - const: core
> > +      - const: mem
> > +      - const: sys
> 
> There are no devices currently using third clock, but I assume it is
> expected or possible.

I think the third clock is typically merged with one of the two clocks but
yeah possibly it's a separate clocke in some cases.

> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Looks good to me too.

So for merging these, as many of the changes touch the omap variants, I
could set up an immutable branch with all the changes after -rc1. Or I can
ack the patches too if somebody has better ideas.

Regards,

Tony

Re: [PATCH 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs

[Rob Herring]

On Wed, Jan 10, 2024 at 10:38:57AM +0200, Tony Lindgren wrote:
> * Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [240109 19:53]:
> > On 09/01/2024 18:19, Andrew Davis wrote:
> > > The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
> > > multiple vendors. Describe how the SGX GPU is integrated in these SoC,
> > > including register space and interrupts. Clocks, reset, and power domain
> > > information is SoC specific.
> > > 
> > > Signed-off-by: Andrew Davis <afd@ti.com>
> > > Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
> > 
> > 
> > > +  clock-names:
> > > +    minItems: 1
> > > +    items:
> > > +      - const: core
> > > +      - const: mem
> > > +      - const: sys
> > 
> > There are no devices currently using third clock, but I assume it is
> > expected or possible.
> 
> I think the third clock is typically merged with one of the two clocks but
> yeah possibly it's a separate clocke in some cases.
> 
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> Looks good to me too.
> 
> So for merging these, as many of the changes touch the omap variants, I
> could set up an immutable branch with all the changes after -rc1. Or I can
> ack the patches too if somebody has better ideas.

Just take all but patches 10 and 11. I don't think it matters if the 
binding is there for them as long as it is all there in next. No one is 
paying that close attention to the warnings I think.

Rob

Re: [PATCH 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs

[Tony Lindgren]

* Rob Herring <robh@kernel.org> [240119 17:48]:
> On Wed, Jan 10, 2024 at 10:38:57AM +0200, Tony Lindgren wrote:
> > So for merging these, as many of the changes touch the omap variants, I
> > could set up an immutable branch with all the changes after -rc1. Or I can
> > ack the patches too if somebody has better ideas.
> 
> Just take all but patches 10 and 11. I don't think it matters if the 
> binding is there for them as long as it is all there in next. No one is 
> paying that close attention to the warnings I think.

OK I've now applied these except patches 10 and 11 into a sgx-for-v6.9
branch [0].

Regards,

Tony

[0] https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git/log/?h=sgx-for-v6.9

[PATCH 03/11] ARM: dts: omap3: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entries to base OMAP3 dtsi files.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/arm/boot/dts/ti/omap/am3517.dtsi   | 11 ++++++-----
 arch/arm/boot/dts/ti/omap/omap34xx.dtsi | 11 ++++++-----
 arch/arm/boot/dts/ti/omap/omap36xx.dtsi |  9 +++++----
 3 files changed, 17 insertions(+), 14 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/am3517.dtsi b/arch/arm/boot/dts/ti/omap/am3517.dtsi
index 77e58e686fb17..19aad715dff70 100644
--- a/arch/arm/boot/dts/ti/omap/am3517.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am3517.dtsi
@@ -162,12 +162,13 @@ sgx_module: target-module@50000000 {
 			clock-names = "fck", "ick";
 			#address-cells = <1>;
 			#size-cells = <1>;
-			ranges = <0 0x50000000 0x4000>;
+			ranges = <0 0x50000000 0x10000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			gpu@0 {
+				compatible = "ti,omap3430-gpu", "img,powervr-sgx530";
+				reg = <0x0 0x10000>; /* 64kB */
+				interrupts = <21>;
+			};
 		};
 	};
 };
diff --git a/arch/arm/boot/dts/ti/omap/omap34xx.dtsi b/arch/arm/boot/dts/ti/omap/omap34xx.dtsi
index fc7233ac183a8..acdd0ee34421d 100644
--- a/arch/arm/boot/dts/ti/omap/omap34xx.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap34xx.dtsi
@@ -164,12 +164,13 @@ sgx_module: target-module@50000000 {
 			clock-names = "fck", "ick";
 			#address-cells = <1>;
 			#size-cells = <1>;
-			ranges = <0 0x50000000 0x4000>;
+			ranges = <0 0x50000000 0x10000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			gpu@0 {
+				compatible = "ti,omap3430-gpu", "img,powervr-sgx530";
+				reg = <0x0 0x10000>; /* 64kB */
+				interrupts = <21>;
+			};
 		};
 	};
 
diff --git a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
index e6d8070c1bf88..c3d79ecd56e39 100644
--- a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi
@@ -211,10 +211,11 @@ sgx_module: target-module@50000000 {
 			#size-cells = <1>;
 			ranges = <0 0x50000000 0x2000000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			gpu@0 {
+				compatible = "ti,omap3630-gpu", "img,powervr-sgx530";
+				reg = <0x0 0x2000000>; /* 32MB */
+				interrupts = <21>;
+			};
 		};
 	};
 
-- 
2.39.2

[PATCH 04/11] ARM: dts: omap4: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entry to base OMAP4 dtsi file.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/arm/boot/dts/ti/omap/omap4.dtsi | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/omap4.dtsi b/arch/arm/boot/dts/ti/omap/omap4.dtsi
index 2bbff9032be3e..559b2bfe4ca7c 100644
--- a/arch/arm/boot/dts/ti/omap/omap4.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap4.dtsi
@@ -501,10 +501,11 @@ sgx_module: target-module@56000000 {
 			#size-cells = <1>;
 			ranges = <0 0x56000000 0x2000000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			gpu@0 {
+				compatible = "ti,omap4430-gpu", "img,powervr-sgx540";
+				reg = <0x0 0x2000000>; /* 32MB */
+				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 
 		/*
-- 
2.39.2

[PATCH 05/11] ARM: dts: omap5: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entry to base OMAP5 dtsi file.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/arm/boot/dts/ti/omap/omap5.dtsi | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/omap5.dtsi b/arch/arm/boot/dts/ti/omap/omap5.dtsi
index bac6fa8387936..6a66214ad0e2f 100644
--- a/arch/arm/boot/dts/ti/omap/omap5.dtsi
+++ b/arch/arm/boot/dts/ti/omap/omap5.dtsi
@@ -453,10 +453,11 @@ target-module@56000000 {
 			#size-cells = <1>;
 			ranges = <0 0x56000000 0x2000000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			gpu@0 {
+				compatible = "ti,omap5432-gpu", "img,powervr-sgx544";
+				reg = <0x0 0x2000000>; /* 32MB */
+				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 
 		target-module@58000000 {
-- 
2.39.2

[PATCH 06/11] ARM: dts: AM33xx: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entry to base AM33xx dtsi file.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/arm/boot/dts/ti/omap/am33xx.dtsi | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi b/arch/arm/boot/dts/ti/omap/am33xx.dtsi
index 5b9e01a8aa5d5..989d5a6edeed9 100644
--- a/arch/arm/boot/dts/ti/omap/am33xx.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am33xx.dtsi
@@ -640,10 +640,11 @@ target-module@56000000 {
 			#size-cells = <1>;
 			ranges = <0 0x56000000 0x1000000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			gpu@0 {
+				compatible = "ti,omap3630-gpu", "img,powervr-sgx530";
+				reg = <0x0 0x10000>; /* 64kB */
+				interrupts = <37>;
+			};
 		};
 	};
 };
-- 
2.39.2

[PATCH 07/11] ARM: dts: AM437x: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entry to base AM437x dtsi file.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/arm/boot/dts/ti/omap/am4372.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi b/arch/arm/boot/dts/ti/omap/am4372.dtsi
index 9d2c064534f7d..5fd1b380ece62 100644
--- a/arch/arm/boot/dts/ti/omap/am4372.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am4372.dtsi
@@ -719,6 +719,12 @@ target-module@56000000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x56000000 0x1000000>;
+
+			gpu@0 {
+				compatible = "ti,omap3630-gpu", "img,powervr-sgx530";
+				reg = <0x0 0x10000>; /* 64kB */
+				interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 	};
 };
-- 
2.39.2

[PATCH 08/11] ARM: dts: DRA7xx: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entry to base DRA7x dtsi file.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/arm/boot/dts/ti/omap/dra7.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi b/arch/arm/boot/dts/ti/omap/dra7.dtsi
index 6509c742fb58c..8527643cb69a8 100644
--- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
@@ -850,12 +850,19 @@ target-module@56000000 {
 					<SYSC_IDLE_SMART>;
 			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>;
+					<SYSC_IDLE_SMART>,
+					<SYSC_IDLE_SMART_WKUP>;
 			clocks = <&gpu_clkctrl DRA7_GPU_CLKCTRL 0>;
 			clock-names = "fck";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x56000000 0x2000000>;
+
+			gpu@0 {
+				compatible = "ti,am5728-gpu", "img,powervr-sgx544";
+				reg = <0x0 0x10000>; /* 64kB */
+				interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 
 		crossbar_mpu: crossbar@4a002a48 {
-- 
2.39.2

Re: [PATCH 08/11] ARM: dts: DRA7xx: Add device tree entry for SGX GPU

[Tony Lindgren]

* Andrew Davis <afd@ti.com> [240109 17:20]:
> --- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
> +++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
> @@ -850,12 +850,19 @@ target-module@56000000 {
>  					<SYSC_IDLE_SMART>;
>  			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
>  					<SYSC_IDLE_NO>,
> -					<SYSC_IDLE_SMART>;
> +					<SYSC_IDLE_SMART>,
> +					<SYSC_IDLE_SMART_WKUP>;

You probably checked this already.. But just in case, can you please
confirm this is intentional. The documentation lists the smart wakeup
capability bit as reserved for dra7, maybe the documentation is wrong.

Regards,

Tony

Re: [PATCH 08/11] ARM: dts: DRA7xx: Add device tree entry for SGX GPU

[Andrew Davis]

On 1/10/24 2:29 AM, Tony Lindgren wrote:
> * Andrew Davis <afd@ti.com> [240109 17:20]:
>> --- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
>> +++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
>> @@ -850,12 +850,19 @@ target-module@56000000 {
>>   					<SYSC_IDLE_SMART>;
>>   			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
>>   					<SYSC_IDLE_NO>,
>> -					<SYSC_IDLE_SMART>;
>> +					<SYSC_IDLE_SMART>,
>> +					<SYSC_IDLE_SMART_WKUP>;
> 
> You probably checked this already.. But just in case, can you please
> confirm this is intentional. The documentation lists the smart wakeup
> capability bit as reserved for dra7, maybe the documentation is wrong.
> 

It was an intentional change, although I'm not sure it is correct :)

This is how we had it in our "evil vendor tree" for years (back when it
was hwmod based), so when converting these nodes to use "ti,sysc" I noticed
this bit was set, but as you point out the documentation disagrees.

I'd rather go with what has worked before, but it doesn't seem to
break anything either way, so we could also break this change out into
its own patch if you would prefer.

Andrew

> Regards,
> 
> Tony
> 

Re: [PATCH 08/11] ARM: dts: DRA7xx: Add device tree entry for SGX GPU

[Tony Lindgren]

* Andrew Davis <afd@ti.com> [240117 15:52]:
> On 1/10/24 2:29 AM, Tony Lindgren wrote:
> > * Andrew Davis <afd@ti.com> [240109 17:20]:
> > > --- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
> > > +++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
> > > @@ -850,12 +850,19 @@ target-module@56000000 {
> > >   					<SYSC_IDLE_SMART>;
> > >   			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
> > >   					<SYSC_IDLE_NO>,
> > > -					<SYSC_IDLE_SMART>;
> > > +					<SYSC_IDLE_SMART>,
> > > +					<SYSC_IDLE_SMART_WKUP>;
> > 
> > You probably checked this already.. But just in case, can you please
> > confirm this is intentional. The documentation lists the smart wakeup
> > capability bit as reserved for dra7, maybe the documentation is wrong.
> > 
> 
> It was an intentional change, although I'm not sure it is correct :)
> 
> This is how we had it in our "evil vendor tree" for years (back when it
> was hwmod based), so when converting these nodes to use "ti,sysc" I noticed
> this bit was set, but as you point out the documentation disagrees.
> 
> I'd rather go with what has worked before, but it doesn't seem to
> break anything either way, so we could also break this change out into
> its own patch if you would prefer.

I agree it's best to stick what is known to work. How about let's add
the related information to the patch description?

Regards,

Tony

Re: [PATCH 08/11] ARM: dts: DRA7xx: Add device tree entry for SGX GPU

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [240118 08:57]:
> * Andrew Davis <afd@ti.com> [240117 15:52]:
> > On 1/10/24 2:29 AM, Tony Lindgren wrote:
> > > * Andrew Davis <afd@ti.com> [240109 17:20]:
> > > > --- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
> > > > +++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
> > > > @@ -850,12 +850,19 @@ target-module@56000000 {
> > > >   					<SYSC_IDLE_SMART>;
> > > >   			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
> > > >   					<SYSC_IDLE_NO>,
> > > > -					<SYSC_IDLE_SMART>;
> > > > +					<SYSC_IDLE_SMART>,
> > > > +					<SYSC_IDLE_SMART_WKUP>;
> > > 
> > > You probably checked this already.. But just in case, can you please
> > > confirm this is intentional. The documentation lists the smart wakeup
> > > capability bit as reserved for dra7, maybe the documentation is wrong.
> > > 
> > 
> > It was an intentional change, although I'm not sure it is correct :)
> > 
> > This is how we had it in our "evil vendor tree" for years (back when it
> > was hwmod based), so when converting these nodes to use "ti,sysc" I noticed
> > this bit was set, but as you point out the documentation disagrees.
> > 
> > I'd rather go with what has worked before, but it doesn't seem to
> > break anything either way, so we could also break this change out into
> > its own patch if you would prefer.
> 
> I agree it's best to stick what is known to work. How about let's add
> the related information to the patch description?

I'll update the commit message for it and apply these, no need to repost.

Regards,

Tony

[PATCH 09/11] arm64: dts: ti: k3-am654-main: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entry to base AM654 dtsi file.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index fcea544656360..64b52c8dafc6c 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -1050,6 +1050,13 @@ dss_ports: ports {
 		};
 	};
 
+	gpu: gpu@7000000 {
+		compatible = "ti,am6548-gpu", "img,powervr-sgx544";
+		reg = <0x0 0x7000000 0x0 0x10000>;
+		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 65 TI_SCI_PD_EXCLUSIVE>;
+	};
+
 	ehrpwm0: pwm@3000000 {
 		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
 		#pwm-cells = <3>;
-- 
2.39.2

[PATCH 10/11] ARM: dts: sun6i: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entry to base sun6i-a31 dtsi file.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/arm/boot/dts/allwinner/sun6i-a31.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
index 5cce4918f84c9..e6998783b89aa 100644
--- a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
@@ -962,6 +962,15 @@ mdio: mdio {
 			};
 		};
 
+		gpu: gpu@1c40000 {
+			compatible = "allwinner,sun6i-a31-gpu", "img,powervr-sgx544";
+			reg = <0x01c40000 0x10000>;
+			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_GPU_CORE>, <&ccu CLK_GPU_MEMORY>;
+			clock-names = "core", "mem";
+			status = "disabled";
+		};
+
 		crypto: crypto-engine@1c15000 {
 			compatible = "allwinner,sun6i-a31-crypto",
 				     "allwinner,sun4i-a10-crypto";
-- 
2.39.2

[PATCH 11/11] MIPS: DTS: jz4780: Add device tree entry for SGX GPU

[Andrew Davis]

Add SGX GPU device entry to base jz4780 dtsi file.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
---
 arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index 18affff85ce38..5ea6833f5e872 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -460,6 +460,17 @@ hdmi: hdmi@10180000 {
 		status = "disabled";
 	};
 
+	gpu: gpu@13040000 {
+		compatible = "ingenic,jz4780-gpu", "img,powervr-sgx540";
+		reg = <0x13040000 0x4000>;
+
+		clocks = <&cgu JZ4780_CLK_GPU>;
+		clock-names = "core";
+
+		interrupt-parent = <&intc>;
+		interrupts = <63>;
+	};
+
 	lcdc0: lcdc0@13050000 {
 		compatible = "ingenic,jz4780-lcd";
 		reg = <0x13050000 0x1800>;
-- 
2.39.2