From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail5.25mail.st (mail5.25mail.st [74.50.62.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99370360AD; Wed, 10 Jan 2024 08:39:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=atomide.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=atomide.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=atomide.com header.i=@atomide.com header.b="lI0HjohH" Received: from localhost (91-158-86-216.elisa-laajakaista.fi [91.158.86.216]) by mail5.25mail.st (Postfix) with ESMTPSA id 081BB6050F; Wed, 10 Jan 2024 08:38:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=atomide.com; s=25mailst; t=1704875996; bh=wG6D9r+AI35mwEbnFd6ymRyQAT79Vq6rM5ctoGLtHBU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=lI0HjohHY5ZqItxAs8wT161JVYpJtAgnjXEDs+XAyJc9k4uwAIKZILCoxniGxeHM7 NMpL2XdZBWs7+S3w/NZWsNimkeJR16R95GGWUpKizv2Adtqb7FXYWlzxwi2V8+nFoP RTiflB6mFHXKPGPj2+TZa7Ttqzte47OVO5wCtpk/a3jM3EtOWoczIwawN0tSH8TgEZ p+8904d/1MpIM6uukmZIHlwKjUrgcv3Hn6jYHHrOMm5heZJAuYWXVcNuvp1ITYC3H5 5YZX2Q1DTS1LnZJLB3LqYmb7VI5cGaZX5FqpnZ+7cjS6IsYI7KpDEbaMmJIcktwVcV lgNioh8C/jw9w== Date: Wed, 10 Jan 2024 10:38:57 +0200 From: Tony Lindgren To: Krzysztof Kozlowski Cc: Andrew Davis , Frank Binns , Matt Coster , "H . Nikolaus Schaller" , Adam Ford , Ivaylo Dimitrov , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?utf-8?Q?Beno=C3=AEt?= Cousson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Paul Cercueil , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-omap@vger.kernel.org, linux-mips@vger.kernel.org Subject: Re: [PATCH 02/11] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs Message-ID: <20240110083857.GB5185@atomide.com> References: <20240109171950.31010-1-afd@ti.com> <20240109171950.31010-3-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: * Krzysztof Kozlowski [240109 19:53]: > On 09/01/2024 18:19, Andrew Davis wrote: > > The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from > > multiple vendors. Describe how the SGX GPU is integrated in these SoC, > > including register space and interrupts. Clocks, reset, and power domain > > information is SoC specific. > > > > Signed-off-by: Andrew Davis > > Reviewed-by: Javier Martinez Canillas > > > > + clock-names: > > + minItems: 1 > > + items: > > + - const: core > > + - const: mem > > + - const: sys > > There are no devices currently using third clock, but I assume it is > expected or possible. I think the third clock is typically merged with one of the two clocks but yeah possibly it's a separate clocke in some cases. > Reviewed-by: Krzysztof Kozlowski Looks good to me too. So for merging these, as many of the changes touch the omap variants, I could set up an immutable branch with all the changes after -rc1. Or I can ack the patches too if somebody has better ideas. Regards, Tony