* [PATCH v4 0/4] Add missing port pins for RZ/Five SoC
@ 2024-01-12 14:26 Prabhakar
2024-01-12 14:26 ` [PATCH v4 1/4] pinctrl: renesas: rzg2l: Improve code for readability Prabhakar
` (3 more replies)
0 siblings, 4 replies; 12+ messages in thread
From: Prabhakar @ 2024-01-12 14:26 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc,
devicetree, linux-riscv, linux-kernel, linux-gpio, Prabhakar,
Biju Das, Claudiu Beznea, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi All,
This patch series intends to incorporate the absent port pins P19 to P28,
which are exclusively available on the RZ/Five SoC.
Cheers,
Prabhakar
v3->v4:
* Rebased the changes on top Claudiu's patches
* patch 1/4 is new patch for using FIELD_PREP_CONST/FIELD_GET as
suggested by Geert
* patch 2/4 adjusted the code again using FIELD_PREP_CONST/FIELD_GET
* patch 3/4 fixed rzg2l_pinctrl_get_variable_pin_cfg() as pointed by Geert
* patch 4/4 is unchanged
* patches 1-3 have been boot tested on g2l family
v2->v3:
* Fixed build warnings for m68k as reported by Kernel test robot.
RFC -> v2:
* Fixed review comments pointed by Geert & Biju
RFC:
Link: https://lore.kernel.org/lkml/20230630120433.49529-3-prabhakar.mahadev-lad.rj@bp.renesas.com/T/
Lad Prabhakar (4):
pinctrl: renesas: rzg2l: Improve code for readability
pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK()
macro
pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
riscv: dts: renesas: r9a07g043f: Update gpio-ranges property
arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 4 +
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 284 +++++++++++++++++---
2 files changed, 248 insertions(+), 40 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v4 1/4] pinctrl: renesas: rzg2l: Improve code for readability
2024-01-12 14:26 [PATCH v4 0/4] Add missing port pins for RZ/Five SoC Prabhakar
@ 2024-01-12 14:26 ` Prabhakar
2024-01-12 14:26 ` [PATCH v4 2/4] pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro Prabhakar
` (2 subsequent siblings)
3 siblings, 0 replies; 12+ messages in thread
From: Prabhakar @ 2024-01-12 14:26 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc,
devicetree, linux-riscv, linux-kernel, linux-gpio, Prabhakar,
Biju Das, Claudiu Beznea, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
As the RZ/G2L pinctrl driver is extensively utilized by numerous SoCs and
has experienced substantial growth, enhance code readability by
incorporating FIELD_PREP_CONST/FIELD_GET macros wherever necessary.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 41 +++++++++++++++----------
1 file changed, 24 insertions(+), 17 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index e90d47136889..fee348b80892 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -5,6 +5,7 @@
* Copyright (C) 2021 Renesas Electronics Corporation.
*/
+#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/gpio/driver.h>
@@ -38,8 +39,6 @@
*/
#define MUX_PIN_ID_MASK GENMASK(15, 0)
#define MUX_FUNC_MASK GENMASK(31, 16)
-#define MUX_FUNC_OFFS 16
-#define MUX_FUNC(pinconf) (((pinconf) & MUX_FUNC_MASK) >> MUX_FUNC_OFFS)
/* PIN capabilities */
#define PIN_CFG_IOLH_A BIT(0)
@@ -81,8 +80,12 @@
* n indicates number of pins in the port, a is the register index
* and f is pin configuration capabilities supported.
*/
-#define RZG2L_GPIO_PORT_PACK(n, a, f) (((n) << 28) | ((a) << 20) | (f))
-#define RZG2L_GPIO_PORT_GET_PINCNT(x) (((x) & GENMASK(30, 28)) >> 28)
+#define PIN_CFG_PIN_CNT_MASK GENMASK(30, 28)
+#define PIN_CFG_PIN_REG_MASK GENMASK(27, 20)
+#define PIN_CFG_MASK GENMASK(19, 0)
+#define RZG2L_GPIO_PORT_PACK(n, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_CNT_MASK, (n)) | \
+ FIELD_PREP_CONST(PIN_CFG_PIN_REG_MASK, (a)) | \
+ FIELD_PREP_CONST(PIN_CFG_MASK, (f)))
/*
* BIT(31) indicates dedicated pin, p is the register index while
@@ -90,14 +93,18 @@
* (b * 8) and f is the pin configuration capabilities supported.
*/
#define RZG2L_SINGLE_PIN BIT(31)
+#define RZG2L_SINGLE_PIN_INDEX_MASK GENMASK(30, 24)
+#define RZG2L_SINGLE_PIN_BITS_MASK GENMASK(22, 20)
+
#define RZG2L_SINGLE_PIN_PACK(p, b, f) (RZG2L_SINGLE_PIN | \
- ((p) << 24) | ((b) << 20) | (f))
-#define RZG2L_SINGLE_PIN_GET_BIT(x) (((x) & GENMASK(22, 20)) >> 20)
+ FIELD_PREP_CONST(RZG2L_SINGLE_PIN_INDEX_MASK, (p)) | \
+ FIELD_PREP_CONST(RZG2L_SINGLE_PIN_BITS_MASK, (b)) | \
+ FIELD_PREP_CONST(PIN_CFG_MASK, (f)))
-#define RZG2L_PIN_CFG_TO_CAPS(cfg) ((cfg) & GENMASK(19, 0))
+#define RZG2L_PIN_CFG_TO_CAPS(cfg) ((cfg) & PIN_CFG_MASK)
#define RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg) ((cfg) & RZG2L_SINGLE_PIN ? \
- (((cfg) & GENMASK(30, 24)) >> 24) : \
- (((cfg) & GENMASK(26, 20)) >> 20))
+ FIELD_GET(RZG2L_SINGLE_PIN_INDEX_MASK, (cfg)) : \
+ FIELD_GET(PIN_CFG_PIN_REG_MASK, (cfg)))
#define P(off) (0x0000 + (off))
#define PM(off) (0x0100 + (off) * 2)
@@ -432,8 +439,8 @@ static int rzg2l_dt_subnode_to_map(struct pinctrl_dev *pctldev,
ret = of_property_read_u32_index(np, "pinmux", i, &value);
if (ret)
goto done;
- pins[i] = value & MUX_PIN_ID_MASK;
- psel_val[i] = MUX_FUNC(value);
+ pins[i] = FIELD_GET(MUX_PIN_ID_MASK, value);
+ psel_val[i] = FIELD_GET(MUX_FUNC_MASK, value);
}
if (parent) {
@@ -560,7 +567,7 @@ static int rzg2l_dt_node_to_map(struct pinctrl_dev *pctldev,
static int rzg2l_validate_gpio_pin(struct rzg2l_pinctrl *pctrl,
u32 cfg, u32 port, u8 bit)
{
- u8 pincount = RZG2L_GPIO_PORT_GET_PINCNT(cfg);
+ u8 pincount = FIELD_GET(PIN_CFG_PIN_CNT_MASK, cfg);
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg);
u32 data;
@@ -868,7 +875,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
cfg = RZG2L_PIN_CFG_TO_CAPS(*pin_data);
if (*pin_data & RZG2L_SINGLE_PIN) {
- bit = RZG2L_SINGLE_PIN_GET_BIT(*pin_data);
+ bit = FIELD_GET(RZG2L_SINGLE_PIN_BITS_MASK, *pin_data);
} else {
bit = RZG2L_PIN_ID_TO_PIN(_pin);
@@ -972,7 +979,7 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
cfg = RZG2L_PIN_CFG_TO_CAPS(*pin_data);
if (*pin_data & RZG2L_SINGLE_PIN) {
- bit = RZG2L_SINGLE_PIN_GET_BIT(*pin_data);
+ bit = FIELD_GET(RZG2L_SINGLE_PIN_BITS_MASK, *pin_data);
} else {
bit = RZG2L_PIN_ID_TO_PIN(_pin);
@@ -1608,12 +1615,12 @@ static int rzg2l_gpio_get_gpioint(unsigned int virq, const struct rzg2l_pinctrl_
bit = virq % 8;
if (port >= data->n_ports ||
- bit >= RZG2L_GPIO_PORT_GET_PINCNT(data->port_pin_configs[port]))
+ bit >= FIELD_GET(PIN_CFG_PIN_CNT_MASK, data->port_pin_configs[port]))
return -EINVAL;
gpioint = bit;
for (i = 0; i < port; i++)
- gpioint += RZG2L_GPIO_PORT_GET_PINCNT(data->port_pin_configs[i]);
+ gpioint += FIELD_GET(PIN_CFG_PIN_CNT_MASK, data->port_pin_configs[i]);
return gpioint;
}
@@ -1788,7 +1795,7 @@ static void rzg2l_init_irq_valid_mask(struct gpio_chip *gc,
bit = offset % 8;
if (port >= pctrl->data->n_ports ||
- bit >= RZG2L_GPIO_PORT_GET_PINCNT(pctrl->data->port_pin_configs[port]))
+ bit >= FIELD_GET(PIN_CFG_PIN_CNT_MASK, pctrl->data->port_pin_configs[port]))
clear_bit(offset, valid_mask);
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v4 2/4] pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro
2024-01-12 14:26 [PATCH v4 0/4] Add missing port pins for RZ/Five SoC Prabhakar
2024-01-12 14:26 ` [PATCH v4 1/4] pinctrl: renesas: rzg2l: Improve code for readability Prabhakar
@ 2024-01-12 14:26 ` Prabhakar
2024-01-13 11:43 ` kernel test robot
2024-01-12 14:26 ` [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 Prabhakar
2024-01-12 14:26 ` [PATCH v4 4/4] riscv: dts: renesas: r9a07g043f: Update gpio-ranges property Prabhakar
3 siblings, 1 reply; 12+ messages in thread
From: Prabhakar @ 2024-01-12 14:26 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc,
devicetree, linux-riscv, linux-kernel, linux-gpio, Prabhakar,
Biju Das, Claudiu Beznea, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Currently we assume all the port pins are sequential ie always PX_0 to
PX_n (n=1..7) exist, but on RZ/Five SoC we have additional pins P19_1 to
P28_5 which have holes in them, for example only one pin on port19 is
available and that is P19_1 and not P19_0. So to handle such cases
include pinmap for each port which would indicate the pin availability
on each port. As the pincount can be calculated based on pinmap drop this
from RZG2L_GPIO_PORT_PACK() macro.
Previously we had a max of 7 pins on each port but on RZ/Five Port-20
has 8 pins, so move the single pin configuration to BIT(63).
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 56 +++++++++++++------------
1 file changed, 29 insertions(+), 27 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index fee348b80892..8b8644d2c355 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -80,19 +80,20 @@
* n indicates number of pins in the port, a is the register index
* and f is pin configuration capabilities supported.
*/
-#define PIN_CFG_PIN_CNT_MASK GENMASK(30, 28)
+#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
#define PIN_CFG_PIN_REG_MASK GENMASK(27, 20)
#define PIN_CFG_MASK GENMASK(19, 0)
-#define RZG2L_GPIO_PORT_PACK(n, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_CNT_MASK, (n)) | \
+
+#define RZG2L_GPIO_PORT_PACK(n, a, f) ((((1ULL << (n)) - 1) << 28) | \
FIELD_PREP_CONST(PIN_CFG_PIN_REG_MASK, (a)) | \
FIELD_PREP_CONST(PIN_CFG_MASK, (f)))
/*
- * BIT(31) indicates dedicated pin, p is the register index while
+ * BIT(63) indicates dedicated pin, p is the register index while
* referencing to SR/IEN/IOLH/FILxx registers, b is the register bits
* (b * 8) and f is the pin configuration capabilities supported.
*/
-#define RZG2L_SINGLE_PIN BIT(31)
+#define RZG2L_SINGLE_PIN BIT_ULL(63)
#define RZG2L_SINGLE_PIN_INDEX_MASK GENMASK(30, 24)
#define RZG2L_SINGLE_PIN_BITS_MASK GENMASK(22, 20)
@@ -196,12 +197,12 @@ struct rzg2l_hwcfg {
struct rzg2l_dedicated_configs {
const char *name;
- u32 config;
+ u64 config;
};
struct rzg2l_pinctrl_data {
const char * const *port_pins;
- const u32 *port_pin_configs;
+ const u64 *port_pin_configs;
unsigned int n_ports;
const struct rzg2l_dedicated_configs *dedicated_pins;
unsigned int n_port_pins;
@@ -302,7 +303,7 @@ static int rzg2l_pinctrl_set_mux(struct pinctrl_dev *pctldev,
pins = group->pins;
for (i = 0; i < group->num_pins; i++) {
- unsigned int *pin_data = pctrl->desc.pins[pins[i]].drv_data;
+ u64 *pin_data = pctrl->desc.pins[pins[i]].drv_data;
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
u32 pin = RZG2L_PIN_ID_TO_PIN(pins[i]);
@@ -565,13 +566,13 @@ static int rzg2l_dt_node_to_map(struct pinctrl_dev *pctldev,
}
static int rzg2l_validate_gpio_pin(struct rzg2l_pinctrl *pctrl,
- u32 cfg, u32 port, u8 bit)
+ u64 cfg, u32 port, u8 bit)
{
- u8 pincount = FIELD_GET(PIN_CFG_PIN_CNT_MASK, cfg);
+ u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg);
- u32 data;
+ u64 data;
- if (bit >= pincount || port >= pctrl->data->n_port_pins)
+ if (!(pinmap & BIT(bit)) || port >= pctrl->data->n_port_pins)
return -EINVAL;
data = pctrl->data->port_pin_configs[port];
@@ -863,7 +864,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
enum pin_config_param param = pinconf_to_config_param(*config);
const struct rzg2l_hwcfg *hwcfg = pctrl->data->hwcfg;
const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin];
- unsigned int *pin_data = pin->drv_data;
+ u64 *pin_data = pin->drv_data;
unsigned int arg = 0;
u32 off, cfg;
int ret;
@@ -966,7 +967,7 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin];
const struct rzg2l_hwcfg *hwcfg = pctrl->data->hwcfg;
struct rzg2l_pinctrl_pin_settings settings = pctrl->settings[_pin];
- unsigned int *pin_data = pin->drv_data;
+ u64 *pin_data = pin->drv_data;
enum pin_config_param param;
unsigned int i, arg, index;
u32 cfg, off;
@@ -1171,7 +1172,7 @@ static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset)
{
struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset];
- u32 *pin_data = pin_desc->drv_data;
+ u64 *pin_data = pin_desc->drv_data;
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
u32 port = RZG2L_PIN_ID_TO_PORT(offset);
u8 bit = RZG2L_PIN_ID_TO_PIN(offset);
@@ -1203,7 +1204,7 @@ static void rzg2l_gpio_set_direction(struct rzg2l_pinctrl *pctrl, u32 offset,
bool output)
{
const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset];
- unsigned int *pin_data = pin_desc->drv_data;
+ u64 *pin_data = pin_desc->drv_data;
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
u8 bit = RZG2L_PIN_ID_TO_PIN(offset);
unsigned long flags;
@@ -1224,7 +1225,7 @@ static int rzg2l_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
{
struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset];
- unsigned int *pin_data = pin_desc->drv_data;
+ u64 *pin_data = pin_desc->drv_data;
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
u8 bit = RZG2L_PIN_ID_TO_PIN(offset);
@@ -1255,7 +1256,7 @@ static void rzg2l_gpio_set(struct gpio_chip *chip, unsigned int offset,
{
struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset];
- unsigned int *pin_data = pin_desc->drv_data;
+ u64 *pin_data = pin_desc->drv_data;
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
u8 bit = RZG2L_PIN_ID_TO_PIN(offset);
unsigned long flags;
@@ -1288,7 +1289,7 @@ static int rzg2l_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset];
- unsigned int *pin_data = pin_desc->drv_data;
+ u64 *pin_data = pin_desc->drv_data;
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
u8 bit = RZG2L_PIN_ID_TO_PIN(offset);
u16 reg16;
@@ -1373,7 +1374,7 @@ static const char * const rzg2l_gpio_names[] = {
"P48_0", "P48_1", "P48_2", "P48_3", "P48_4", "P48_5", "P48_6", "P48_7",
};
-static const u32 r9a07g044_gpio_configs[] = {
+static const u64 r9a07g044_gpio_configs[] = {
RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
@@ -1425,7 +1426,7 @@ static const u32 r9a07g044_gpio_configs[] = {
RZG2L_GPIO_PORT_PACK(5, 0x40, RZG2L_MPXED_PIN_FUNCS),
};
-static const u32 r9a07g043_gpio_configs[] = {
+static const u64 r9a07g043_gpio_configs[] = {
RZG2L_GPIO_PORT_PACK(4, 0x10, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(5, 0x11, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
RZG2L_GPIO_PORT_PACK(4, 0x12, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
@@ -1447,7 +1448,7 @@ static const u32 r9a07g043_gpio_configs[] = {
RZG2L_GPIO_PORT_PACK(6, 0x22, RZG2L_MPXED_PIN_FUNCS),
};
-static const u32 r9a08g045_gpio_configs[] = {
+static const u64 r9a08g045_gpio_configs[] = {
RZG2L_GPIO_PORT_PACK(4, 0x20, RZG3S_MPXED_PIN_FUNCS(A)), /* P0 */
RZG2L_GPIO_PORT_PACK(5, 0x30, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IOLH_C |
PIN_CFG_IO_VMC_ETH0)) |
@@ -1615,12 +1616,12 @@ static int rzg2l_gpio_get_gpioint(unsigned int virq, const struct rzg2l_pinctrl_
bit = virq % 8;
if (port >= data->n_ports ||
- bit >= FIELD_GET(PIN_CFG_PIN_CNT_MASK, data->port_pin_configs[port]))
+ bit >= hweight8(FIELD_GET(PIN_CFG_PIN_MAP_MASK, data->port_pin_configs[port])))
return -EINVAL;
gpioint = bit;
for (i = 0; i < port; i++)
- gpioint += FIELD_GET(PIN_CFG_PIN_CNT_MASK, data->port_pin_configs[i]);
+ gpioint += hweight8(FIELD_GET(PIN_CFG_PIN_MAP_MASK, data->port_pin_configs[i]));
return gpioint;
}
@@ -1631,7 +1632,7 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d)
struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip);
unsigned int hwirq = irqd_to_hwirq(d);
const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[hwirq];
- unsigned int *pin_data = pin_desc->drv_data;
+ u64 *pin_data = pin_desc->drv_data;
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
u8 bit = RZG2L_PIN_ID_TO_PIN(hwirq);
unsigned long flags;
@@ -1658,7 +1659,7 @@ static void rzg2l_gpio_irq_enable(struct irq_data *d)
struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip);
unsigned int hwirq = irqd_to_hwirq(d);
const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[hwirq];
- unsigned int *pin_data = pin_desc->drv_data;
+ u64 *pin_data = pin_desc->drv_data;
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
u8 bit = RZG2L_PIN_ID_TO_PIN(hwirq);
unsigned long flags;
@@ -1795,7 +1796,8 @@ static void rzg2l_init_irq_valid_mask(struct gpio_chip *gc,
bit = offset % 8;
if (port >= pctrl->data->n_ports ||
- bit >= FIELD_GET(PIN_CFG_PIN_CNT_MASK, pctrl->data->port_pin_configs[port]))
+ bit >= hweight8(FIELD_GET(PIN_CFG_PIN_MAP_MASK,
+ pctrl->data->port_pin_configs[port])))
clear_bit(offset, valid_mask);
}
}
@@ -1877,7 +1879,7 @@ static int rzg2l_pinctrl_register(struct rzg2l_pinctrl *pctrl)
const struct rzg2l_hwcfg *hwcfg = pctrl->data->hwcfg;
struct pinctrl_pin_desc *pins;
unsigned int i, j;
- u32 *pin_data;
+ u64 *pin_data;
int ret;
pctrl->desc.name = DRV_NAME;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
2024-01-12 14:26 [PATCH v4 0/4] Add missing port pins for RZ/Five SoC Prabhakar
2024-01-12 14:26 ` [PATCH v4 1/4] pinctrl: renesas: rzg2l: Improve code for readability Prabhakar
2024-01-12 14:26 ` [PATCH v4 2/4] pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro Prabhakar
@ 2024-01-12 14:26 ` Prabhakar
2024-01-12 14:31 ` Biju Das
` (2 more replies)
2024-01-12 14:26 ` [PATCH v4 4/4] riscv: dts: renesas: r9a07g043f: Update gpio-ranges property Prabhakar
3 siblings, 3 replies; 12+ messages in thread
From: Prabhakar @ 2024-01-12 14:26 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc,
devicetree, linux-riscv, linux-kernel, linux-gpio, Prabhakar,
Biju Das, Claudiu Beznea, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add the missing port pins P19 to P28 for RZ/Five SoC. These additional
pins provide expanded capabilities and are exclusive to the RZ/Five SoC.
Couple of port pins have different configuration and are not identical for
the complete port so introduce struct rzg2l_variable_pin_cfg to handle
such cases and introduce the PIN_CFG_VARIABLE macro. The actual pin config
is then assigned in rzg2l_pinctrl_get_variable_pin_cfg().
Add an additional check in rzg2l_gpio_get_gpioint() to only allow GPIO pins
which support interrupt facility.
While at define RZG2L_GPIO_PORT_PACK() using RZG2L_GPIO_PORT_SPARSE_PACK().
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 213 +++++++++++++++++++++++-
1 file changed, 204 insertions(+), 9 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 8b8644d2c355..04bb21d564d4 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -57,6 +57,8 @@
#define PIN_CFG_IOLH_C BIT(13)
#define PIN_CFG_SOFT_PS BIT(14)
#define PIN_CFG_OEN BIT(15)
+#define PIN_CFG_VARIABLE BIT(16)
+#define PIN_CFG_NOGPIO_INT BIT(17)
#define RZG2L_MPXED_COMMON_PIN_FUNCS(group) \
(PIN_CFG_IOLH_##group | \
@@ -76,17 +78,23 @@
PIN_CFG_FILNUM | \
PIN_CFG_FILCLKSEL)
-/*
- * n indicates number of pins in the port, a is the register index
- * and f is pin configuration capabilities supported.
- */
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
#define PIN_CFG_PIN_REG_MASK GENMASK(27, 20)
#define PIN_CFG_MASK GENMASK(19, 0)
-#define RZG2L_GPIO_PORT_PACK(n, a, f) ((((1ULL << (n)) - 1) << 28) | \
- FIELD_PREP_CONST(PIN_CFG_PIN_REG_MASK, (a)) | \
- FIELD_PREP_CONST(PIN_CFG_MASK, (f)))
+/*
+ * m indicates the bitmap of supported pins, a is the register index
+ * and f is pin configuration capabilities supported.
+ */
+#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
+ FIELD_PREP_CONST(PIN_CFG_PIN_REG_MASK, (a)) | \
+ FIELD_PREP_CONST(PIN_CFG_MASK, (f)))
+
+/*
+ * n indicates number of pins in the port, a is the register index
+ * and f is pin configuration capabilities supported.
+ */
+#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
/*
* BIT(63) indicates dedicated pin, p is the register index while
@@ -200,6 +208,18 @@ struct rzg2l_dedicated_configs {
u64 config;
};
+/**
+ * struct rzg2l_variable_pin_cfg - pin data cfg
+ * @cfg: port pin configuration
+ * @port: port number
+ * @pin: port pin
+ */
+struct rzg2l_variable_pin_cfg {
+ u32 cfg:20;
+ u8 port:5;
+ u8 pin:5;
+};
+
struct rzg2l_pinctrl_data {
const char * const *port_pins;
const u64 *port_pin_configs;
@@ -208,6 +228,8 @@ struct rzg2l_pinctrl_data {
unsigned int n_port_pins;
unsigned int n_dedicated_pins;
const struct rzg2l_hwcfg *hwcfg;
+ const struct rzg2l_variable_pin_cfg *variable_pin_cfg;
+ unsigned int n_variable_pin_cfg;
};
/**
@@ -243,6 +265,143 @@ struct rzg2l_pinctrl {
static const u16 available_ps[] = { 1800, 2500, 3300 };
+#ifdef CONFIG_RISCV
+static u64 rzg2l_pinctrl_get_variable_pin_cfg(struct rzg2l_pinctrl *pctrl,
+ u64 pincfg,
+ unsigned int port,
+ u8 pin)
+{
+ unsigned int i;
+
+ for (i = 0; i < pctrl->data->n_variable_pin_cfg; i++) {
+ if (pctrl->data->variable_pin_cfg[i].port == port &&
+ pctrl->data->variable_pin_cfg[i].pin == pin)
+ return (pincfg & ~PIN_CFG_VARIABLE) | pctrl->data->variable_pin_cfg[i].cfg;
+ }
+
+ return 0;
+}
+
+static const struct rzg2l_variable_pin_cfg r9a07g043f_variable_pin_cfg[] = {
+ {
+ .port = 20,
+ .pin = 0,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 20,
+ .pin = 1,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 20,
+ .pin = 2,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 20,
+ .pin = 3,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 20,
+ .pin = 4,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 20,
+ .pin = 5,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 20,
+ .pin = 6,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 20,
+ .pin = 7,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 23,
+ .pin = 1,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_NOGPIO_INT
+ },
+ {
+ .port = 23,
+ .pin = 2,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 23,
+ .pin = 3,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 23,
+ .pin = 4,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 23,
+ .pin = 5,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 24,
+ .pin = 0,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 24,
+ .pin = 1,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 24,
+ .pin = 2,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 24,
+ .pin = 3,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 24,
+ .pin = 4,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_NOGPIO_INT,
+ },
+ {
+ .port = 24,
+ .pin = 5,
+ .cfg = PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
+ PIN_CFG_NOGPIO_INT,
+ },
+};
+#endif
+
static void rzg2l_pinctrl_set_pfc_mode(struct rzg2l_pinctrl *pctrl,
u8 pin, u8 off, u8 func)
{
@@ -1446,6 +1605,25 @@ static const u64 r9a07g043_gpio_configs[] = {
RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(4, 0x21, RZG2L_MPXED_PIN_FUNCS),
RZG2L_GPIO_PORT_PACK(6, 0x22, RZG2L_MPXED_PIN_FUNCS),
+#ifdef CONFIG_RISCV
+ /* Below additional port pins (P19 - P28) are exclusively available on RZ/Five SoC only */
+ RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x06, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT), /* P19 */
+ RZG2L_GPIO_PORT_PACK(8, 0x07, PIN_CFG_VARIABLE), /* P20 */
+ RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x08, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT), /* P21 */
+ RZG2L_GPIO_PORT_PACK(4, 0x09, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
+ PIN_CFG_IEN | PIN_CFG_NOGPIO_INT), /* P22 */
+ RZG2L_GPIO_PORT_SPARSE_PACK(0x3e, 0x0a, PIN_CFG_VARIABLE), /* P23 */
+ RZG2L_GPIO_PORT_PACK(6, 0x0b, PIN_CFG_VARIABLE), /* P24 */
+ RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x0c, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_FILONOFF |
+ PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
+ PIN_CFG_NOGPIO_INT), /* P25 */
+ 0x0, /* P26 */
+ 0x0, /* P27 */
+ RZG2L_GPIO_PORT_PACK(6, 0x0f, RZG2L_MPXED_PIN_FUNCS | PIN_CFG_NOGPIO_INT), /* P28 */
+#endif
};
static const u64 r9a08g045_gpio_configs[] = {
@@ -1606,12 +1784,18 @@ static const struct rzg2l_dedicated_configs rzg3s_dedicated_pins[] = {
PIN_CFG_IO_VMC_SD1)) },
};
-static int rzg2l_gpio_get_gpioint(unsigned int virq, const struct rzg2l_pinctrl_data *data)
+static int rzg2l_gpio_get_gpioint(unsigned int virq, struct rzg2l_pinctrl *pctrl)
{
+ const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[virq];
+ const struct rzg2l_pinctrl_data *data = pctrl->data;
+ u64 *pin_data = pin_desc->drv_data;
unsigned int gpioint;
unsigned int i;
u32 port, bit;
+ if (*pin_data & PIN_CFG_NOGPIO_INT)
+ return -EINVAL;
+
port = virq / 8;
bit = virq % 8;
@@ -1721,7 +1905,7 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
unsigned long flags;
int gpioint, irq;
- gpioint = rzg2l_gpio_get_gpioint(child, pctrl->data);
+ gpioint = rzg2l_gpio_get_gpioint(child, pctrl);
if (gpioint < 0)
return gpioint;
@@ -1907,6 +2091,13 @@ static int rzg2l_pinctrl_register(struct rzg2l_pinctrl *pctrl)
if (i && !(i % RZG2L_PINS_PER_PORT))
j++;
pin_data[i] = pctrl->data->port_pin_configs[j];
+#ifdef CONFIG_RISCV
+ if (pin_data[i] & PIN_CFG_VARIABLE)
+ pin_data[i] = rzg2l_pinctrl_get_variable_pin_cfg(pctrl,
+ pin_data[i],
+ j,
+ i % RZG2L_PINS_PER_PORT);
+#endif
pins[i].drv_data = &pin_data[i];
}
@@ -2058,6 +2249,10 @@ static struct rzg2l_pinctrl_data r9a07g043_data = {
.n_port_pins = ARRAY_SIZE(r9a07g043_gpio_configs) * RZG2L_PINS_PER_PORT,
.n_dedicated_pins = ARRAY_SIZE(rzg2l_dedicated_pins.common),
.hwcfg = &rzg2l_hwcfg,
+#ifdef CONFIG_RISCV
+ .variable_pin_cfg = r9a07g043f_variable_pin_cfg,
+ .n_variable_pin_cfg = ARRAY_SIZE(r9a07g043f_variable_pin_cfg),
+#endif
};
static struct rzg2l_pinctrl_data r9a07g044_data = {
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v4 4/4] riscv: dts: renesas: r9a07g043f: Update gpio-ranges property
2024-01-12 14:26 [PATCH v4 0/4] Add missing port pins for RZ/Five SoC Prabhakar
` (2 preceding siblings ...)
2024-01-12 14:26 ` [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 Prabhakar
@ 2024-01-12 14:26 ` Prabhakar
3 siblings, 0 replies; 12+ messages in thread
From: Prabhakar @ 2024-01-12 14:26 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-renesas-soc,
devicetree, linux-riscv, linux-kernel, linux-gpio, Prabhakar,
Biju Das, Claudiu Beznea, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
On RZ/Five we have additional pins compared to the RZ/G2UL SoC so update
the gpio-ranges property in RZ/Five SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
index d2272a0bfb61..aa3b1d2b999d 100644
--- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
+++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
@@ -46,6 +46,10 @@ cpu0_intc: interrupt-controller {
};
};
+&pinctrl {
+ gpio-ranges = <&pinctrl 0 0 232>;
+};
+
&soc {
dma-noncoherent;
interrupt-parent = <&plic>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* RE: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
2024-01-12 14:26 ` [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 Prabhakar
@ 2024-01-12 14:31 ` Biju Das
2024-01-12 17:05 ` Lad, Prabhakar
2024-01-13 14:59 ` kernel test robot
2024-01-13 20:40 ` kernel test robot
2 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2024-01-12 14:31 UTC (permalink / raw)
To: Prabhakar, Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org, Claudiu Beznea, Prabhakar Mahadev Lad
Hi Prabhakar,
> -----Original Message-----
> From: Prabhakar <prabhakar.csengg@gmail.com>
> Sent: Friday, January 12, 2024 2:26 PM
> Subject: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing
> port pins P19 to P28
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add the missing port pins P19 to P28 for RZ/Five SoC. These additional
> pins provide expanded capabilities and are exclusive to the RZ/Five SoC.
>
> Couple of port pins have different configuration and are not identical for
> the complete port so introduce struct rzg2l_variable_pin_cfg to handle
> such cases and introduce the PIN_CFG_VARIABLE macro. The actual pin config
> is then assigned in rzg2l_pinctrl_get_variable_pin_cfg().
>
> Add an additional check in rzg2l_gpio_get_gpioint() to only allow GPIO
> pins which support interrupt facility.
>
> While at define RZG2L_GPIO_PORT_PACK() using
> RZG2L_GPIO_PORT_SPARSE_PACK().
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> drivers/pinctrl/renesas/pinctrl-rzg2l.c | 213 +++++++++++++++++++++++-
> 1 file changed, 204 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> index 8b8644d2c355..04bb21d564d4 100644
> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -57,6 +57,8 @@
> #define PIN_CFG_IOLH_C BIT(13)
> #define PIN_CFG_SOFT_PS BIT(14)
> #define PIN_CFG_OEN BIT(15)
> +#define PIN_CFG_VARIABLE BIT(16)
> +#define PIN_CFG_NOGPIO_INT BIT(17)
>
> #define RZG2L_MPXED_COMMON_PIN_FUNCS(group) \
> (PIN_CFG_IOLH_##group | \
> @@ -76,17 +78,23 @@
> PIN_CFG_FILNUM | \
> PIN_CFG_FILCLKSEL)
>
> -/*
> - * n indicates number of pins in the port, a is the register index
> - * and f is pin configuration capabilities supported.
> - */
> #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
> #define PIN_CFG_PIN_REG_MASK GENMASK(27, 20)
> #define PIN_CFG_MASK GENMASK(19, 0)
>
> -#define RZG2L_GPIO_PORT_PACK(n, a, f) ((((1ULL << (n)) - 1) << 28) | \
> - FIELD_PREP_CONST(PIN_CFG_PIN_REG_MASK, (a))
> | \
> - FIELD_PREP_CONST(PIN_CFG_MASK, (f)))
> +/*
> + * m indicates the bitmap of supported pins, a is the register index
> + * and f is pin configuration capabilities supported.
> + */
> +#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f)
> (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
> +
> FIELD_PREP_CONST(PIN_CFG_PIN_REG_MASK, (a)) | \
> + FIELD_PREP_CONST(PIN_CFG_MASK, (f)))
> +
> +/*
> + * n indicates number of pins in the port, a is the register index
> + * and f is pin configuration capabilities supported.
> + */
> +#define RZG2L_GPIO_PORT_PACK(n, a, f)
> RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
>
> /*
> * BIT(63) indicates dedicated pin, p is the register index while @@ -
> 200,6 +208,18 @@ struct rzg2l_dedicated_configs {
> u64 config;
> };
>
> +/**
> + * struct rzg2l_variable_pin_cfg - pin data cfg
> + * @cfg: port pin configuration
> + * @port: port number
> + * @pin: port pin
> + */
> +struct rzg2l_variable_pin_cfg {
> + u32 cfg:20;
> + u8 port:5;
u32 ??
> + u8 pin:5;
u32 ??
Cheers,
Biju
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
2024-01-12 14:31 ` Biju Das
@ 2024-01-12 17:05 ` Lad, Prabhakar
2024-01-12 17:10 ` Biju Das
0 siblings, 1 reply; 12+ messages in thread
From: Lad, Prabhakar @ 2024-01-12 17:05 UTC (permalink / raw)
To: Biju Das
Cc: Geert Uytterhoeven, Magnus Damm, Linus Walleij, Rob Herring,
Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org, Claudiu Beznea, Prabhakar Mahadev Lad
Hi Biju,
Thank you for the review.
On Fri, Jan 12, 2024 at 2:31 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
>
>
> Hi Prabhakar,
>
> > -----Original Message-----
> > From: Prabhakar <prabhakar.csengg@gmail.com>
> > Sent: Friday, January 12, 2024 2:26 PM
> > Subject: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing
> > port pins P19 to P28
> >
<snip>
> >
> > +/**
> > + * struct rzg2l_variable_pin_cfg - pin data cfg
> > + * @cfg: port pin configuration
> > + * @port: port number
> > + * @pin: port pin
> > + */
> > +struct rzg2l_variable_pin_cfg {
> > + u32 cfg:20;
> > + u8 port:5;
>
> u32 ??
This is done based on the feedback provided previously by Geert [0].
> > + u8 pin:5;
>
> u32 ??
>
ditto.
[0] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20231201131551.201503-3-prabhakar.mahadev-lad.rj@bp.renesas.com/#25625118
Cheers,
Prabhakar
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
2024-01-12 17:05 ` Lad, Prabhakar
@ 2024-01-12 17:10 ` Biju Das
2024-01-12 17:14 ` Lad, Prabhakar
0 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2024-01-12 17:10 UTC (permalink / raw)
To: Lad, Prabhakar
Cc: Geert Uytterhoeven, Magnus Damm, Linus Walleij, Rob Herring,
Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org, Claudiu Beznea, Prabhakar Mahadev Lad
> -----Original Message-----
> From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
> Sent: Friday, January 12, 2024 5:06 PM
> Subject: Re: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the
> missing port pins P19 to P28
>
> Hi Biju,
>
> Thank you for the review.
>
> On Fri, Jan 12, 2024 at 2:31 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> >
> >
> > Hi Prabhakar,
> >
> > > -----Original Message-----
> > > From: Prabhakar <prabhakar.csengg@gmail.com>
> > > Sent: Friday, January 12, 2024 2:26 PM
> > > Subject: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the
> > > missing port pins P19 to P28
> > >
> <snip>
> > >
> > > +/**
> > > + * struct rzg2l_variable_pin_cfg - pin data cfg
> > > + * @cfg: port pin configuration
> > > + * @port: port number
> > > + * @pin: port pin
> > > + */
> > > +struct rzg2l_variable_pin_cfg {
> > > + u32 cfg:20;
> > > + u8 port:5;
> >
> > u32 ??
> This is done based on the feedback provided previously by Geert [0].
>
> > > + u8 pin:5;
> >
> > u32 ??
> >
> ditto.
>
As per[0] suggestion is,
As cfg only contains the lower bits (PIN_CFG_*), I think you can fit
everything in a u32:
u32 cfg: 20;
u32 port: 5;
u32 pin: 3;
Cheers,
Biju
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
2024-01-12 17:10 ` Biju Das
@ 2024-01-12 17:14 ` Lad, Prabhakar
0 siblings, 0 replies; 12+ messages in thread
From: Lad, Prabhakar @ 2024-01-12 17:14 UTC (permalink / raw)
To: Biju Das
Cc: Geert Uytterhoeven, Magnus Damm, Linus Walleij, Rob Herring,
Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org, Claudiu Beznea, Prabhakar Mahadev Lad
On Fri, Jan 12, 2024 at 5:10 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
>
>
>
> > -----Original Message-----
> > From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
> > Sent: Friday, January 12, 2024 5:06 PM
> > Subject: Re: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the
> > missing port pins P19 to P28
> >
> > Hi Biju,
> >
> > Thank you for the review.
> >
> > On Fri, Jan 12, 2024 at 2:31 PM Biju Das <biju.das.jz@bp.renesas.com>
> > wrote:
> > >
> > >
> > > Hi Prabhakar,
> > >
> > > > -----Original Message-----
> > > > From: Prabhakar <prabhakar.csengg@gmail.com>
> > > > Sent: Friday, January 12, 2024 2:26 PM
> > > > Subject: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the
> > > > missing port pins P19 to P28
> > > >
> > <snip>
> > > >
> > > > +/**
> > > > + * struct rzg2l_variable_pin_cfg - pin data cfg
> > > > + * @cfg: port pin configuration
> > > > + * @port: port number
> > > > + * @pin: port pin
> > > > + */
> > > > +struct rzg2l_variable_pin_cfg {
> > > > + u32 cfg:20;
> > > > + u8 port:5;
> > >
> > > u32 ??
> > This is done based on the feedback provided previously by Geert [0].
> >
> > > > + u8 pin:5;
> > >
> > > u32 ??
> > >
> > ditto.
> >
>
> As per[0] suggestion is,
>
> As cfg only contains the lower bits (PIN_CFG_*), I think you can fit
> everything in a u32:
>
> u32 cfg: 20;
> u32 port: 5;
> u32 pin: 3;
>
Ouch my bad, i'll send a v5 with this change.
Cheers,
Prabhakar
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 2/4] pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro
2024-01-12 14:26 ` [PATCH v4 2/4] pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro Prabhakar
@ 2024-01-13 11:43 ` kernel test robot
0 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2024-01-13 11:43 UTC (permalink / raw)
To: Prabhakar, Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: oe-kbuild-all, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc, devicetree, linux-riscv, linux-kernel,
linux-gpio, Prabhakar, Biju Das, Claudiu Beznea, Lad Prabhakar
Hi Prabhakar,
kernel test robot noticed the following build warnings:
[auto build test WARNING on geert-renesas-drivers/renesas-pinctrl]
[also build test WARNING on geert-renesas-devel/next linus/master v6.7]
[cannot apply to linusw-pinctrl/devel linusw-pinctrl/for-next next-20240112]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Prabhakar/pinctrl-renesas-rzg2l-Improve-code-for-readability/20240112-222833
base: https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git renesas-pinctrl
patch link: https://lore.kernel.org/r/20240112142621.13525-3-prabhakar.mahadev-lad.rj%40bp.renesas.com
patch subject: [PATCH v4 2/4] pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro
config: powerpc-randconfig-r081-20240113 (https://download.01.org/0day-ci/archive/20240113/202401131928.oie6xLjA-lkp@intel.com/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240113/202401131928.oie6xLjA-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202401131928.oie6xLjA-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 4 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 4 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 5 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 6 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 5 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 6 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:435:22: note: expanded from macro 'compiletime_assert'
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:155:30: note: expanded from macro 'FIELD_GET'
(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
^~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:571:24: warning: shift count is negative [-Wshift-count-negative]
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:155:50: note: expanded from macro 'FIELD_GET'
(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
~~~~~~~~~^~~~~~
include/linux/bitfield.h:45:38: note: expanded from macro '__bf_shf'
#define __bf_shf(x) (__builtin_ffsll(x) - 1)
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1619:32: warning: shift count is negative [-Wshift-count-negative]
bit >= hweight8(FIELD_GET(PIN_CFG_PIN_MAP_MASK, data->port_pin_configs[port])))
~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 4 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
^
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^
include/asm-generic/bitops/const_hweight.h:26:44: note: expanded from macro 'hweight8'
#define hweight8(w) (__builtin_constant_p(w) ? __const_hweight8(w) : __arch_hweight8(w))
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1619:32: warning: shift count is negative [-Wshift-count-negative]
bit >= hweight8(FIELD_GET(PIN_CFG_PIN_MAP_MASK, data->port_pin_configs[port])))
~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 4 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
^
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^
include/asm-generic/bitops/const_hweight.h:26:44: note: expanded from macro 'hweight8'
#define hweight8(w) (__builtin_constant_p(w) ? __const_hweight8(w) : __arch_hweight8(w))
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1619:32: warning: shift count is negative [-Wshift-count-negative]
bit >= hweight8(FIELD_GET(PIN_CFG_PIN_MAP_MASK, data->port_pin_configs[port])))
~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 4 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
^
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
if (!(condition)) \
^
include/asm-generic/bitops/const_hweight.h:26:44: note: expanded from macro 'hweight8'
#define hweight8(w) (__builtin_constant_p(w) ? __const_hweight8(w) : __arch_hweight8(w))
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1619:32: warning: shift count is negative [-Wshift-count-negative]
bit >= hweight8(FIELD_GET(PIN_CFG_PIN_MAP_MASK, data->port_pin_configs[port])))
~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:83:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
note: (skipping 5 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/compiler_types.h:423:23: note: expanded from macro '_compiletime_assert'
__compiletime_assert(condition, msg, prefix, suffix)
^
include/linux/compiler_types.h:415:9: note: expanded from macro '__compiletime_assert'
vim +571 drivers/pinctrl/renesas/pinctrl-rzg2l.c
567
568 static int rzg2l_validate_gpio_pin(struct rzg2l_pinctrl *pctrl,
569 u64 cfg, u32 port, u8 bit)
570 {
> 571 u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
572 u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg);
573 u64 data;
574
575 if (!(pinmap & BIT(bit)) || port >= pctrl->data->n_port_pins)
576 return -EINVAL;
577
578 data = pctrl->data->port_pin_configs[port];
579 if (off != RZG2L_PIN_CFG_TO_PORT_OFFSET(data))
580 return -EINVAL;
581
582 return 0;
583 }
584
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
2024-01-12 14:26 ` [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 Prabhakar
2024-01-12 14:31 ` Biju Das
@ 2024-01-13 14:59 ` kernel test robot
2024-01-13 20:40 ` kernel test robot
2 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2024-01-13 14:59 UTC (permalink / raw)
To: Prabhakar, Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: oe-kbuild-all, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc, devicetree, linux-riscv, linux-kernel,
linux-gpio, Prabhakar, Biju Das, Claudiu Beznea, Lad Prabhakar
Hi Prabhakar,
kernel test robot noticed the following build errors:
[auto build test ERROR on geert-renesas-drivers/renesas-pinctrl]
[cannot apply to geert-renesas-devel/next linusw-pinctrl/devel linusw-pinctrl/for-next linus/master v6.7 next-20240112]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Prabhakar/pinctrl-renesas-rzg2l-Improve-code-for-readability/20240112-222833
base: https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git renesas-pinctrl
patch link: https://lore.kernel.org/r/20240112142621.13525-4-prabhakar.mahadev-lad.rj%40bp.renesas.com
patch subject: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
config: openrisc-allyesconfig (https://download.01.org/0day-ci/archive/20240113/202401132220.aTrR8ckA-lkp@intel.com/config)
compiler: or1k-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240113/202401132220.aTrR8ckA-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202401132220.aTrR8ckA-lkp@intel.com/
All errors (new ones prefixed by >>):
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:730:31: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
730 | u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
| ^~~~~~~~~~~~~~~~~~~~
In file included from include/linux/bitfield.h:10:
drivers/pinctrl/renesas/pinctrl-rzg2l.c: At top level:
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1537:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1537 | RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1537:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1537 | RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1537:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1537 | RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1537:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1537 | RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1537:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1537 | RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1537:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1537 | RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[0]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1537:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1537 | RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1538:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1538 | RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1538:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1538 | RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1538:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1538 | RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1538:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1538 | RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1538:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1538 | RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1538:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1538 | RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[1]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1538:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1538 | RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1539:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1539 | RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1539:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1539 | RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1539:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1539 | RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1539:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1539 | RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1539:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1539 | RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1539:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1539 | RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[2]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1539:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1539 | RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1540:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1540 | RZG2L_GPIO_PORT_PACK(2, 0x13, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1540:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1540 | RZG2L_GPIO_PORT_PACK(2, 0x13, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1540:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1540 | RZG2L_GPIO_PORT_PACK(2, 0x13, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1540:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1540 | RZG2L_GPIO_PORT_PACK(2, 0x13, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1540:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1540 | RZG2L_GPIO_PORT_PACK(2, 0x13, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1540:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1540 | RZG2L_GPIO_PORT_PACK(2, 0x13, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[3]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1540:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1540 | RZG2L_GPIO_PORT_PACK(2, 0x13, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1541:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1541 | RZG2L_GPIO_PORT_PACK(2, 0x14, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1541:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1541 | RZG2L_GPIO_PORT_PACK(2, 0x14, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1541:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1541 | RZG2L_GPIO_PORT_PACK(2, 0x14, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1541:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1541 | RZG2L_GPIO_PORT_PACK(2, 0x14, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1541:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1541 | RZG2L_GPIO_PORT_PACK(2, 0x14, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1541:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1541 | RZG2L_GPIO_PORT_PACK(2, 0x14, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[4]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1541:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1541 | RZG2L_GPIO_PORT_PACK(2, 0x14, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1542:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1542 | RZG2L_GPIO_PORT_PACK(3, 0x15, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1542:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1542 | RZG2L_GPIO_PORT_PACK(3, 0x15, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1542:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1542 | RZG2L_GPIO_PORT_PACK(3, 0x15, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1542:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1542 | RZG2L_GPIO_PORT_PACK(3, 0x15, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1542:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1542 | RZG2L_GPIO_PORT_PACK(3, 0x15, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1542:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1542 | RZG2L_GPIO_PORT_PACK(3, 0x15, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[5]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1542:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1542 | RZG2L_GPIO_PORT_PACK(3, 0x15, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1543:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1543 | RZG2L_GPIO_PORT_PACK(2, 0x16, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1543:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1543 | RZG2L_GPIO_PORT_PACK(2, 0x16, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1543:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1543 | RZG2L_GPIO_PORT_PACK(2, 0x16, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1543:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1543 | RZG2L_GPIO_PORT_PACK(2, 0x16, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1543:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1543 | RZG2L_GPIO_PORT_PACK(2, 0x16, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1543:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1543 | RZG2L_GPIO_PORT_PACK(2, 0x16, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[6]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1543:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1543 | RZG2L_GPIO_PORT_PACK(2, 0x16, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1544:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1544 | RZG2L_GPIO_PORT_PACK(3, 0x17, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1544:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1544 | RZG2L_GPIO_PORT_PACK(3, 0x17, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1544:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1544 | RZG2L_GPIO_PORT_PACK(3, 0x17, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1544:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1544 | RZG2L_GPIO_PORT_PACK(3, 0x17, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1544:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1544 | RZG2L_GPIO_PORT_PACK(3, 0x17, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1544:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1544 | RZG2L_GPIO_PORT_PACK(3, 0x17, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[7]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1544:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1544 | RZG2L_GPIO_PORT_PACK(3, 0x17, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1545:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1545 | RZG2L_GPIO_PORT_PACK(3, 0x18, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1545:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1545 | RZG2L_GPIO_PORT_PACK(3, 0x18, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1545:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1545 | RZG2L_GPIO_PORT_PACK(3, 0x18, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1545:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1545 | RZG2L_GPIO_PORT_PACK(3, 0x18, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1545:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1545 | RZG2L_GPIO_PORT_PACK(3, 0x18, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1545:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1545 | RZG2L_GPIO_PORT_PACK(3, 0x18, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[8]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1545:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1545 | RZG2L_GPIO_PORT_PACK(3, 0x18, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1546:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1546 | RZG2L_GPIO_PORT_PACK(2, 0x19, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1546:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1546 | RZG2L_GPIO_PORT_PACK(2, 0x19, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1546:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1546 | RZG2L_GPIO_PORT_PACK(2, 0x19, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1546:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1546 | RZG2L_GPIO_PORT_PACK(2, 0x19, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1546:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1546 | RZG2L_GPIO_PORT_PACK(2, 0x19, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1546:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1546 | RZG2L_GPIO_PORT_PACK(2, 0x19, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[9]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1546:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1546 | RZG2L_GPIO_PORT_PACK(2, 0x19, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1547:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1547 | RZG2L_GPIO_PORT_PACK(2, 0x1a, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1547:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1547 | RZG2L_GPIO_PORT_PACK(2, 0x1a, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1547:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1547 | RZG2L_GPIO_PORT_PACK(2, 0x1a, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1547:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1547 | RZG2L_GPIO_PORT_PACK(2, 0x1a, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1547:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1547 | RZG2L_GPIO_PORT_PACK(2, 0x1a, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1547:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1547 | RZG2L_GPIO_PORT_PACK(2, 0x1a, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[10]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1547:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1547 | RZG2L_GPIO_PORT_PACK(2, 0x1a, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1548:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1548 | RZG2L_GPIO_PORT_PACK(2, 0x1b, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1548:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1548 | RZG2L_GPIO_PORT_PACK(2, 0x1b, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1548:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1548 | RZG2L_GPIO_PORT_PACK(2, 0x1b, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1548:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1548 | RZG2L_GPIO_PORT_PACK(2, 0x1b, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1548:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1548 | RZG2L_GPIO_PORT_PACK(2, 0x1b, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1548:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1548 | RZG2L_GPIO_PORT_PACK(2, 0x1b, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[11]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1548:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1548 | RZG2L_GPIO_PORT_PACK(2, 0x1b, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1549:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1549 | RZG2L_GPIO_PORT_PACK(2, 0x1c, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1549:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1549 | RZG2L_GPIO_PORT_PACK(2, 0x1c, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1549:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1549 | RZG2L_GPIO_PORT_PACK(2, 0x1c, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1549:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1549 | RZG2L_GPIO_PORT_PACK(2, 0x1c, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1549:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1549 | RZG2L_GPIO_PORT_PACK(2, 0x1c, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1549:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1549 | RZG2L_GPIO_PORT_PACK(2, 0x1c, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[12]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1549:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1549 | RZG2L_GPIO_PORT_PACK(2, 0x1c, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1550:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1550 | RZG2L_GPIO_PORT_PACK(3, 0x1d, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1550:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1550 | RZG2L_GPIO_PORT_PACK(3, 0x1d, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1550:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1550 | RZG2L_GPIO_PORT_PACK(3, 0x1d, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1550:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1550 | RZG2L_GPIO_PORT_PACK(3, 0x1d, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1550:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1550 | RZG2L_GPIO_PORT_PACK(3, 0x1d, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1550:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1550 | RZG2L_GPIO_PORT_PACK(3, 0x1d, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[13]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1550:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1550 | RZG2L_GPIO_PORT_PACK(3, 0x1d, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1551:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1551 | RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1551:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1551 | RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1551:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1551 | RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1551:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1551 | RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1551:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1551 | RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1551:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1551 | RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[14]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1551:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1551 | RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1552:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1552 | RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1552:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1552 | RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1552:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1552 | RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1552:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1552 | RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1552:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1552 | RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1552:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1552 | RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[15]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1552:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1552 | RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1553:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1553 | RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1553:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1553 | RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1553:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1553 | RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1553:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1553 | RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1553:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1553 | RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1553:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1553 | RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[16]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1553:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1553 | RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1554:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1554 | RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1554:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1554 | RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1554:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1554 | RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1554:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1554 | RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1554:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1554 | RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1554:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1554 | RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[17]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1554:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1554 | RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1555:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1555 | RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1555:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1555 | RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1555:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1555 | RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1555:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1555 | RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1555:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1555 | RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1555:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1555 | RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[18]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1555:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1555 | RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1556:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1556 | RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1556:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1556 | RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1556:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1556 | RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1556:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1556 | RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1556:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1556 | RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: error: initializer element is not constant
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1556:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1556 | RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:49: note: (near initialization for 'r9a07g044_gpio_configs[19]')
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1556:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1556 | RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:135:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
135 | BUILD_BUG_ON_ZERO((_mask) == 0) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1557:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1557 | RZG2L_GPIO_PORT_PACK(3, 0x24, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:137:17: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
137 | BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1557:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1557 | RZG2L_GPIO_PORT_PACK(3, 0x24, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:16:51: error: bit-field '<anonymous>' width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
| ^
include/linux/bitfield.h:118:33: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
118 | #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) != 0)
| ^~~~~~~~~~~~~~~~~
include/linux/bitfield.h:139:17: note: in expansion of macro '__BF_CHECK_POW2'
139 | __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \
| ^~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1557:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1557 | RZG2L_GPIO_PORT_PACK(3, 0x24, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:45:38: note: in definition of macro '__bf_shf'
45 | #define __bf_shf(x) (__builtin_ffsll(x) - 1)
| ^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:50: note: in expansion of macro 'FIELD_PREP_CONST'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
| ^~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:67: note: in expansion of macro 'PIN_CFG_PIN_MAP_MASK'
89 | #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
| ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:41: note: in expansion of macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
97 | #define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1557:9: note: in expansion of macro 'RZG2L_GPIO_PORT_PACK'
1557 | RZG2L_GPIO_PORT_PACK(3, 0x24, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
| ^~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:35:18: warning: right shift count is negative [-Wshift-count-negative]
35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
| ^~
include/linux/bitfield.h:141:64: note: in definition of macro 'FIELD_PREP_CONST'
141 | (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
| ^~~~~
include/linux/bits.h:37:38: note: in expansion of macro '__GENMASK'
37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
| ^~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:41: note: in expansion of macro 'GENMASK'
81 | #define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
vim +89 drivers/pinctrl/renesas/pinctrl-rzg2l.c
84
85 /*
86 * m indicates the bitmap of supported pins, a is the register index
87 * and f is pin configuration capabilities supported.
88 */
> 89 #define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
90 FIELD_PREP_CONST(PIN_CFG_PIN_REG_MASK, (a)) | \
91 FIELD_PREP_CONST(PIN_CFG_MASK, (f)))
92
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
2024-01-12 14:26 ` [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 Prabhakar
2024-01-12 14:31 ` Biju Das
2024-01-13 14:59 ` kernel test robot
@ 2024-01-13 20:40 ` kernel test robot
2 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2024-01-13 20:40 UTC (permalink / raw)
To: Prabhakar, Geert Uytterhoeven, Magnus Damm, Linus Walleij
Cc: oe-kbuild-all, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc, devicetree, linux-riscv, linux-kernel,
linux-gpio, Prabhakar, Biju Das, Claudiu Beznea, Lad Prabhakar
Hi Prabhakar,
kernel test robot noticed the following build errors:
[auto build test ERROR on geert-renesas-drivers/renesas-pinctrl]
[cannot apply to geert-renesas-devel/next linusw-pinctrl/devel linusw-pinctrl/for-next linus/master v6.7 next-20240112]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Prabhakar/pinctrl-renesas-rzg2l-Improve-code-for-readability/20240112-222833
base: https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git renesas-pinctrl
patch link: https://lore.kernel.org/r/20240112142621.13525-4-prabhakar.mahadev-lad.rj%40bp.renesas.com
patch subject: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
config: powerpc-randconfig-r081-20240113 (https://download.01.org/0day-ci/archive/20240114/202401140457.dWlCUkuN-lkp@intel.com/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240114/202401140457.dWlCUkuN-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202401140457.dWlCUkuN-lkp@intel.com/
All errors (new ones prefixed by >>):
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:50: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
^~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1577:2: warning: shift count is negative [-Wshift-count-negative]
RZG2L_GPIO_PORT_PACK(3, 0x38, RZG2L_MPXED_PIN_FUNCS),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:64: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:39: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
~~~~~~~~~^~~~~~
include/linux/bitfield.h:45:38: note: expanded from macro '__bf_shf'
#define __bf_shf(x) (__builtin_ffsll(x) - 1)
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1577:2: warning: shift count is negative [-Wshift-count-negative]
RZG2L_GPIO_PORT_PACK(3, 0x38, RZG2L_MPXED_PIN_FUNCS),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:64: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:50: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
^~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1578:2: warning: shift count is negative [-Wshift-count-negative]
RZG2L_GPIO_PORT_PACK(2, 0x39, RZG2L_MPXED_PIN_FUNCS),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:64: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:39: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
~~~~~~~~~^~~~~~
include/linux/bitfield.h:45:38: note: expanded from macro '__bf_shf'
#define __bf_shf(x) (__builtin_ffsll(x) - 1)
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1578:2: warning: shift count is negative [-Wshift-count-negative]
RZG2L_GPIO_PORT_PACK(2, 0x39, RZG2L_MPXED_PIN_FUNCS),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:64: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:50: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
^~~~~
>> drivers/pinctrl/renesas/pinctrl-rzg2l.c:1579:2: error: anonymous bit-field has negative width (-1)
RZG2L_GPIO_PORT_PACK(5, 0x3a, RZG2L_MPXED_PIN_FUNCS),
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:47: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
^
include/linux/bitfield.h:137:3: note: expanded from macro 'FIELD_PREP_CONST'
BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \
^
include/linux/build_bug.h:16:53: note: expanded from macro 'BUILD_BUG_ON_ZERO'
#define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1579:2: warning: shift count is negative [-Wshift-count-negative]
RZG2L_GPIO_PORT_PACK(5, 0x3a, RZG2L_MPXED_PIN_FUNCS),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:64: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:39: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
~~~~~~~~~^~~~~~
include/linux/bitfield.h:45:38: note: expanded from macro '__bf_shf'
#define __bf_shf(x) (__builtin_ffsll(x) - 1)
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1579:2: warning: shift count is negative [-Wshift-count-negative]
RZG2L_GPIO_PORT_PACK(5, 0x3a, RZG2L_MPXED_PIN_FUNCS),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:64: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:50: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
^~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1580:2: warning: shift count is negative [-Wshift-count-negative]
RZG2L_GPIO_PORT_PACK(4, 0x3b, RZG2L_MPXED_PIN_FUNCS),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:64: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:39: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
~~~~~~~~~^~~~~~
include/linux/bitfield.h:45:38: note: expanded from macro '__bf_shf'
#define __bf_shf(x) (__builtin_ffsll(x) - 1)
^
drivers/pinctrl/renesas/pinctrl-rzg2l.c:1580:2: warning: shift count is negative [-Wshift-count-negative]
RZG2L_GPIO_PORT_PACK(4, 0x3b, RZG2L_MPXED_PIN_FUNCS),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:97:39: note: expanded from macro 'RZG2L_GPIO_PORT_PACK'
#define RZG2L_GPIO_PORT_PACK(n, a, f) RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:89:64: note: expanded from macro 'RZG2L_GPIO_PORT_SPARSE_PACK'
#define RZG2L_GPIO_PORT_SPARSE_PACK(m, a, f) (FIELD_PREP_CONST(PIN_CFG_PIN_MAP_MASK, (m)) | \
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/pinctrl-rzg2l.c:81:31: note: expanded from macro 'PIN_CFG_PIN_MAP_MASK'
#define PIN_CFG_PIN_MAP_MASK GENMASK(35, 28)
^
include/linux/bits.h:37:31: note: expanded from macro 'GENMASK'
(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
^
include/linux/bits.h:35:11: note: expanded from macro '__GENMASK'
(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
^
include/linux/bitfield.h:141:50: note: expanded from macro 'FIELD_PREP_CONST'
(((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \
^~~~~
vim +1579 drivers/pinctrl/renesas/pinctrl-rzg2l.c
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1535
943be6806bed3f Lad Prabhakar 2024-01-12 1536 static const u64 r9a07g044_gpio_configs[] = {
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1537 RZG2L_GPIO_PORT_PACK(2, 0x10, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1538 RZG2L_GPIO_PORT_PACK(2, 0x11, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1539 RZG2L_GPIO_PORT_PACK(2, 0x12, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1540 RZG2L_GPIO_PORT_PACK(2, 0x13, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1541 RZG2L_GPIO_PORT_PACK(2, 0x14, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1542 RZG2L_GPIO_PORT_PACK(3, 0x15, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1543 RZG2L_GPIO_PORT_PACK(2, 0x16, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1544 RZG2L_GPIO_PORT_PACK(3, 0x17, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1545 RZG2L_GPIO_PORT_PACK(3, 0x18, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1546 RZG2L_GPIO_PORT_PACK(2, 0x19, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1547 RZG2L_GPIO_PORT_PACK(2, 0x1a, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1548 RZG2L_GPIO_PORT_PACK(2, 0x1b, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1549 RZG2L_GPIO_PORT_PACK(2, 0x1c, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1550 RZG2L_GPIO_PORT_PACK(3, 0x1d, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1551 RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1552 RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1553 RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS),
fcfb63148c241a Biju Das 2021-09-22 1554 RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1555 RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1556 RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1557 RZG2L_GPIO_PORT_PACK(3, 0x24, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1558 RZG2L_GPIO_PORT_PACK(2, 0x25, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1559 RZG2L_GPIO_PORT_PACK(2, 0x26, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1560 RZG2L_GPIO_PORT_PACK(2, 0x27, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1561 RZG2L_GPIO_PORT_PACK(2, 0x28, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1562 RZG2L_GPIO_PORT_PACK(2, 0x29, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1563 RZG2L_GPIO_PORT_PACK(2, 0x2a, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1564 RZG2L_GPIO_PORT_PACK(2, 0x2b, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1565 RZG2L_GPIO_PORT_PACK(2, 0x2c, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH0)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1566 RZG2L_GPIO_PORT_PACK(2, 0x2d, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1567 RZG2L_GPIO_PORT_PACK(2, 0x2e, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1568 RZG2L_GPIO_PORT_PACK(2, 0x2f, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1569 RZG2L_GPIO_PORT_PACK(2, 0x30, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1570 RZG2L_GPIO_PORT_PACK(2, 0x31, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1571 RZG2L_GPIO_PORT_PACK(2, 0x32, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1572 RZG2L_GPIO_PORT_PACK(2, 0x33, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1573 RZG2L_GPIO_PORT_PACK(2, 0x34, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
22972a2d5bc4ba Lad Prabhakar 2021-11-10 1574 RZG2L_GPIO_PORT_PACK(3, 0x35, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IO_VMC_ETH1)),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1575 RZG2L_GPIO_PORT_PACK(2, 0x36, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1576 RZG2L_GPIO_PORT_PACK(3, 0x37, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1577 RZG2L_GPIO_PORT_PACK(3, 0x38, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1578 RZG2L_GPIO_PORT_PACK(2, 0x39, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 @1579 RZG2L_GPIO_PORT_PACK(5, 0x3a, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1580 RZG2L_GPIO_PORT_PACK(4, 0x3b, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1581 RZG2L_GPIO_PORT_PACK(4, 0x3c, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1582 RZG2L_GPIO_PORT_PACK(4, 0x3d, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1583 RZG2L_GPIO_PORT_PACK(4, 0x3e, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1584 RZG2L_GPIO_PORT_PACK(4, 0x3f, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1585 RZG2L_GPIO_PORT_PACK(5, 0x40, RZG2L_MPXED_PIN_FUNCS),
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1586 };
c4c4637eb57f2a Lad Prabhakar 2021-07-27 1587
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2024-01-13 20:41 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-01-12 14:26 [PATCH v4 0/4] Add missing port pins for RZ/Five SoC Prabhakar
2024-01-12 14:26 ` [PATCH v4 1/4] pinctrl: renesas: rzg2l: Improve code for readability Prabhakar
2024-01-12 14:26 ` [PATCH v4 2/4] pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro Prabhakar
2024-01-13 11:43 ` kernel test robot
2024-01-12 14:26 ` [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 Prabhakar
2024-01-12 14:31 ` Biju Das
2024-01-12 17:05 ` Lad, Prabhakar
2024-01-12 17:10 ` Biju Das
2024-01-12 17:14 ` Lad, Prabhakar
2024-01-13 14:59 ` kernel test robot
2024-01-13 20:40 ` kernel test robot
2024-01-12 14:26 ` [PATCH v4 4/4] riscv: dts: renesas: r9a07g043f: Update gpio-ranges property Prabhakar
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