From: Conor Dooley <conor@kernel.org>
To: Devarsh Thakkar <devarsht@ti.com>
Cc: jyri.sarha@iki.fi, tomi.valkeinen@ideasonboard.com,
airlied@gmail.com, daniel@ffwll.ch,
maarten.lankhorst@linux.intel.com, mripard@kernel.org,
tzimmermann@suse.de, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, praneeth@ti.com, nm@ti.com,
vigneshr@ti.com, a-bhatia1@ti.com, j-luthra@ti.com,
kristo@kernel.org
Subject: Re: [DO NOT MERGE PATCH 2/2] arm64: dts: ti: Add common1 register space for AM62x and AM65x SoCs
Date: Mon, 15 Jan 2024 16:14:36 +0000 [thread overview]
Message-ID: <20240115-penpal-pluck-d156ccf21b2f@spud> (raw)
In-Reply-To: <20240115125716.560363-3-devarsht@ti.com>
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On Mon, Jan 15, 2024 at 06:27:16PM +0530, Devarsh Thakkar wrote:
> This adds common1 register space for AM62x and AM65x SoC's which are using
> TI's Keystone display hardware and supporting it as described in
> Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml.
>
> This region is documented in respective Technical Reference Manuals [1].
>
> [1]:
> AM62x TRM:
> https://www.ti.com/lit/pdf/spruiv7 (Section 14.8.9.1 DSS Registers)
>
> AM65x TRM:
> https://www.ti.com/lit/pdf/spruid7 (Section 12.6.5 DSS Registers)
>
> Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
> ---
"[DO NOT MERGE PATCH 2/2]" but no rationale here as to why this cannot
be merged? What's the problem with it?
Cheers,
Conor.
> arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 5 +++--
> arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 5 +++--
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> index 464b7565d085..298bf8d5de8c 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -779,9 +779,10 @@ dss: dss@30200000 {
> <0x00 0x30207000 0x00 0x1000>, /* ovr1 */
> <0x00 0x30208000 0x00 0x1000>, /* ovr2 */
> <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */
> - <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */
> + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */
> + <0x00 0x30201000 0x00 0x1000>; /* common1 */
> reg-names = "common", "vidl1", "vid",
> - "ovr1", "ovr2", "vp1", "vp2";
> + "ovr1", "ovr2", "vp1", "vp2", "common1";
> power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 186 6>,
> <&dss_vp1_clk>,
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> index fcea54465636..5b2d4365b911 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> @@ -1019,9 +1019,10 @@ dss: dss@4a00000 {
> <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
> <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
> <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
> - <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
> + <0x0 0x04a0b000 0x0 0x1000>, /* vp2 */
> + <0x0 0x04a01000 0x0 0x1000>; /* common1 */
> reg-names = "common", "vidl1", "vid",
> - "ovr1", "ovr2", "vp1", "vp2";
> + "ovr1", "ovr2", "vp1", "vp2", "common1";
>
> ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
>
> --
> 2.34.1
>
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next prev parent reply other threads:[~2024-01-15 16:14 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-15 12:57 [PATCH 0/2] Add common1 register space for TI Keystone displays Devarsh Thakkar
2024-01-15 12:57 ` [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add support for common1 region Devarsh Thakkar
2024-01-15 16:17 ` Conor Dooley
2024-01-16 9:13 ` Devarsh Thakkar
2024-01-16 9:36 ` Conor Dooley
2024-02-14 9:10 ` Tomi Valkeinen
2024-02-14 9:23 ` Tomi Valkeinen
2024-02-14 11:23 ` Devarsh Thakkar
2024-01-15 12:57 ` [DO NOT MERGE PATCH 2/2] arm64: dts: ti: Add common1 register space for AM62x and AM65x SoCs Devarsh Thakkar
2024-01-15 16:14 ` Conor Dooley [this message]
2024-01-16 9:18 ` Devarsh Thakkar
2024-01-16 9:38 ` Conor Dooley
2024-01-16 14:05 ` Rob Herring
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