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Fri, 19 Jan 2024 00:17:10 -0800 (PST) Received: from thinkpad ([117.248.2.56]) by smtp.gmail.com with ESMTPSA id fb30-20020a056a002d9e00b006d9af8c25easm4506321pfb.84.2024.01.19.00.17.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jan 2024 00:17:10 -0800 (PST) Date: Fri, 19 Jan 2024 13:47:00 +0530 From: Manivannan Sadhasivam To: Frank Li Cc: krzysztof.kozlowski@linaro.org, bhelgaas@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, festevam@gmail.com, helgaas@kernel.org, hongxing.zhu@nxp.com, imx@lists.linux.dev, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, kw@linux.com, l.stach@pengutronix.de, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lpieralisi@kernel.org, robh@kernel.org, s.hauer@pengutronix.de, shawnguo@kernel.org Subject: Re: [PATCH v8 01/16] PCI: imx6: Simplify clock handling by using clk_bulk*() function Message-ID: <20240119081700.GD2866@thinkpad> References: <20240108232145.2116455-1-Frank.Li@nxp.com> <20240108232145.2116455-2-Frank.Li@nxp.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240108232145.2116455-2-Frank.Li@nxp.com> On Mon, Jan 08, 2024 at 06:21:30PM -0500, Frank Li wrote: > Refector the clock handling logic. Add 'clk_names' define in drvdata. Use > clk_bulk*() api simplify the code. > > Signed-off-by: Frank Li > --- One comment below. With that addressed, Reviewed-by: Manivannan Sadhasivam > > Notes: > Change from v7 to v8 > - update comment message > - using ARRAY_SIZE to count clk_names. > Change from v6 to v7 > - none > Change from v4 to v5 > - update commit message > - direct using clk name list, instead of macro > - still keep caculate clk list count because sizeof return pre allocated > array size. > > Change from v3 to v4 > - using clk_bulk_*() API > Change from v1 to v3 > - none > > Change from v4 to v5 > - update commit message > - direct using clk name list, instead of macro > - still keep caculate clk list count because sizeof return pre allocated > array size. > > Change from v3 to v4 > - using clk_bulk_*() API > Change from v1 to v3 > - none > > drivers/pci/controller/dwc/pci-imx6.c | 144 ++++++++++---------------- > 1 file changed, 54 insertions(+), 90 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 74703362aeec7..4912c6b08ecf8 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c [...] > > +static const char * const > +imx6_3clks_bus_pcie_phy[] = {"pcie_bus", "pcie", "pcie_phy"}; > +static const char * const > +imx6_3clks_bus_pcie_aux[] = {"pcie_bus", "pcie", "pcie_aux"}; > +static const char * const > +imx6_4clks_bus_pcie_phy_aux[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux"}; > +static const char * const > +imx6_4clks_bus_pcie_phy_axi[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_inbound_axi"}; > + Use platform names for defining the array. Like, imx6q_clks[] imx6sx_clks[] imx8mq_clks[] imx8mm_clks[] and reuse them for other platforms as well. This gives an idea of how the clocks got inherited from some base platforms. - Mani > static const struct imx6_pcie_drvdata drvdata[] = { > [IMX6Q] = { > .variant = IMX6Q, > @@ -1477,6 +1421,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { > IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE, > .dbi_length = 0x200, > .gpr = "fsl,imx6q-iomuxc-gpr", > + .clk_names = imx6_3clks_bus_pcie_phy, > + .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_phy), > }, > [IMX6SX] = { > .variant = IMX6SX, > @@ -1484,6 +1430,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { > IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE | > IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, > .gpr = "fsl,imx6q-iomuxc-gpr", > + .clk_names = imx6_4clks_bus_pcie_phy_axi, > + .clks_cnt = ARRAY_SIZE(imx6_4clks_bus_pcie_phy_axi), > }, > [IMX6QP] = { > .variant = IMX6QP, > @@ -1492,40 +1440,56 @@ static const struct imx6_pcie_drvdata drvdata[] = { > IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, > .dbi_length = 0x200, > .gpr = "fsl,imx6q-iomuxc-gpr", > + .clk_names = imx6_3clks_bus_pcie_phy, > + .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_phy), > }, > [IMX7D] = { > .variant = IMX7D, > .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, > .gpr = "fsl,imx7d-iomuxc-gpr", > + .clk_names = imx6_3clks_bus_pcie_phy, > + .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_phy), > }, > [IMX8MQ] = { > .variant = IMX8MQ, > .gpr = "fsl,imx8mq-iomuxc-gpr", > + .clk_names = imx6_4clks_bus_pcie_phy_aux, > + .clks_cnt = ARRAY_SIZE(imx6_4clks_bus_pcie_phy_aux), > }, > [IMX8MM] = { > .variant = IMX8MM, > .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, > .gpr = "fsl,imx8mm-iomuxc-gpr", > + .clk_names = imx6_3clks_bus_pcie_aux, > + .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_aux), > }, > [IMX8MP] = { > .variant = IMX8MP, > .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, > .gpr = "fsl,imx8mp-iomuxc-gpr", > + .clk_names = imx6_3clks_bus_pcie_aux, > + .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_aux), > }, > [IMX8MQ_EP] = { > .variant = IMX8MQ_EP, > .mode = DW_PCIE_EP_TYPE, > .gpr = "fsl,imx8mq-iomuxc-gpr", > + .clk_names = imx6_4clks_bus_pcie_phy_aux, > + .clks_cnt = ARRAY_SIZE(imx6_4clks_bus_pcie_phy_aux), > }, > [IMX8MM_EP] = { > .variant = IMX8MM_EP, > .mode = DW_PCIE_EP_TYPE, > .gpr = "fsl,imx8mm-iomuxc-gpr", > + .clk_names = imx6_3clks_bus_pcie_aux, > + .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_aux), > }, > [IMX8MP_EP] = { > .variant = IMX8MP_EP, > .mode = DW_PCIE_EP_TYPE, > .gpr = "fsl,imx8mp-iomuxc-gpr", > + .clk_names = imx6_3clks_bus_pcie_aux, > + .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_aux), > }, > }; > > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம்