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From: Conor Dooley <conor@kernel.org>
To: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: linux-riscv@lists.infradead.org,
	Conor Dooley <conor.dooley@microchip.com>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	Wolfgang Grandegger <wg@grandegger.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-can@vger.kernel.org, netdev@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 2/7] dt-bindings: can: mpfs: add missing required clock
Date: Mon, 22 Jan 2024 14:56:09 +0000	[thread overview]
Message-ID: <20240122-uncoated-cherub-a29cba1c0035@spud> (raw)
In-Reply-To: <20240122-smokeless-ion-63e4148c22e5-mkl@pengutronix.de>

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On Mon, Jan 22, 2024 at 03:46:04PM +0100, Marc Kleine-Budde wrote:
> On 22.01.2024 14:21:04, Conor Dooley wrote:
> > On Mon, Jan 22, 2024 at 02:13:16PM +0100, Marc Kleine-Budde wrote:
> > > On 22.01.2024 12:19:50, Conor Dooley wrote:
> > > > From: Conor Dooley <conor.dooley@microchip.com>
> > > > 
> > > > The CAN controller on PolarFire SoC has an AHB peripheral clock _and_ a
> > > > CAN bus clock. The bus clock was omitted when the binding was written,
> > > > but is required for operation. Make up for lost time and add it.
> > > > 
> > > > Cautionary tale in adding bindings without having implemented a real
> > > > user for them perhaps.
> > > > 
> > > > Fixes: c878d518d7b6 ("dt-bindings: can: mpfs: document the mpfs CAN controller")
> > > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > > > ---
> > > >  .../devicetree/bindings/net/can/microchip,mpfs-can.yaml     | 6 ++++--
> > > >  1 file changed, 4 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml b/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
> > > > index 45aa3de7cf01..01e4d4a54df6 100644
> > > > --- a/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
> > > > +++ b/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
> > > > @@ -24,7 +24,9 @@ properties:
> > > >      maxItems: 1
> > > >  
> > > >    clocks:
> > > > -    maxItems: 1
> > > > +    items:
> > > > +      - description: AHB peripheral clock
> > > > +      - description: CAN bus clock
> > > 
> > > What about adding clock-names, so that the order can be checked
> > > automatically?
> > 
> > I don't personally care for doing so, but if your heart is set on having
> > them, then sure.
> 
> Usually the CAN driver needs to have the clock rate of the clocks that
> the basis for the CAN bus clock. Looking at the clocks description it's
> probably the 2nd one.
> 
> With clock-names we can automatically check that the 2nd clock is always
> the CAN clock.

I think we already had this discussion on v1, where I said that the
binding requires the clocks to be in that order, regardless of whether
or not clock-names is provided. You feel more strongly about it than I
do, so I will add them when I get around to sending a v3.

Cheers,
Conor.

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  reply	other threads:[~2024-01-22 14:56 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-22 12:19 [PATCH v2 0/7] MPFS clock fixes required for correct CAN clock modeling Conor Dooley
2024-01-22 12:19 ` [PATCH v2 1/7] dt-bindings: clock: mpfs: add more MSSPLL output definitions Conor Dooley
2024-01-22 12:19 ` [PATCH v2 2/7] dt-bindings: can: mpfs: add missing required clock Conor Dooley
2024-01-22 13:13   ` Marc Kleine-Budde
2024-01-22 14:21     ` Conor Dooley
2024-01-22 14:46       ` Marc Kleine-Budde
2024-01-22 14:56         ` Conor Dooley [this message]
2024-01-22 15:31           ` Marc Kleine-Budde
2024-01-22 15:47             ` Conor Dooley
2024-01-30 12:11             ` Conor Dooley
2024-01-30 13:01               ` Marc Kleine-Budde
2024-02-06 14:19                 ` Conor Dooley
2024-01-23 11:27   ` Krzysztof Kozlowski
2024-01-22 12:19 ` [PATCH v2 3/7] clk: microchip: mpfs: split MSSPLL in two Conor Dooley
2024-01-22 12:19 ` [PATCH v2 4/7] clk: microchip: mpfs: setup for using other mss pll outputs Conor Dooley
2024-01-22 12:19 ` [PATCH v2 5/7] clk: microchip: mpfs: add missing MSSPLL outputs Conor Dooley
2024-01-22 12:19 ` [PATCH v2 6/7] clk: microchip: mpfs: convert MSSPLL outputs to clk_divider Conor Dooley
2024-01-22 12:19 ` [PATCH v2 7/7] riscv: dts: microchip: add missing CAN bus clocks Conor Dooley
2024-02-06 14:27 ` (subset) [PATCH v2 0/7] MPFS clock fixes required for correct CAN clock modeling Conor Dooley

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