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Date: Fri, 26 Jan 2024 16:32:39 +0000
From: Conor Dooley <conor@kernel.org>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH v5 1/4] dt-bindings: mailbox: fsl,mu: add i.MX95
 Generic/ELE/V2X MU compatible
Message-ID: <20240126-confirm-jawless-dca60fc9afce@spud>
References: <20240126-imx-mailbox-v5-0-7ff3a3d53529@nxp.com>
 <20240126-imx-mailbox-v5-1-7ff3a3d53529@nxp.com>
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On Fri, Jan 26, 2024 at 02:29:14PM +0800, Peng Fan (OSS) wrote:
>  examples:
> @@ -134,3 +159,34 @@ examples:
>          interrupts =3D <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
>          #mbox-cells =3D <2>;
>      };
> +
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    mu2: mailbox@445b0000 {
> +        compatible =3D "fsl,imx95-mu";
> +        reg =3D <0x445b0000 0x10000>;
> +        ranges;
> +        interrupts =3D <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> +        #address-cells =3D <1>;
> +        #size-cells =3D <1>;
> +        #mbox-cells =3D <2>;
> +
> +        sram@445b1000 {
> +            compatible =3D "mmio-sram";
> +            reg =3D <0x445b1000 0x400>;
> +            ranges =3D <0x0 0x445b1000 0x400>;
> +            #address-cells =3D <1>;
> +            #size-cells =3D <1>;
> +
> +            scmi_buf0: scmi-sram-section@0 {

If you are resending, the labels here for the section nodes are not used
and should be dropped. Ditto the "mu2" label above.

Otherwise, this looks okay to me.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> +                compatible =3D "arm,scmi-shmem";
> +                reg =3D <0x0 0x80>;
> +            };
> +
> +            scmi_buf1: scmi-sram-section@80 {
> +                compatible =3D "arm,scmi-shmem";
> +                reg =3D <0x80 0x80>;
> +            };
> +        };
> +    };
>=20
> --=20
> 2.37.1
>=20

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