[PATCH v4 0/6] serial: 8250: Add support for rs485 half/full duplex on puma/ringneck-haikou

[PATCH v4 0/6] serial: 8250: Add support for rs485 half/full duplex on puma/ringneck-haikou

[Farouk Bouabid]

This series tries to revive the work of Heiko Stuebner from 2020

On the boards that we are using (ringneck/puma-haikou) a hardware switch
can set the rs485 transceiver into half or full duplex mode.

In half-duplex mode the DE/RE signal of the rs485 transceiver is not
connected to an RTS signal whose control is already handled in the rs485
emulation (start/stop callbacks), but rather to a gpio. And since enabling
the receiver requires setting this gpio active we need to do that in em485
while receiving and disable it while sending to enable the driver mode.

In full-duplex mode RE is grounded and separated  from DE. Meanwhile the
rx-enable gpio remains connected to the DE pin. In this case the
receiver-enable gpio should be disabled to enable driver mode in parallel
to the enabled receiver.

This patch-series adds support for controlling the receiver mode using a
gpio in em485 for half-duplex mode while allowing users to keep using the
full-duplex feature if em485 is disabled.

Changes in v4:
- define the state of rx-enable gpio when em485 is disabled
- add rs485 half/full duplex support to ringneck/puma-haikou
- use dev_err_probe instead of dev_err if error is -EPROBE_DEFER

Changes from the 2020 submission include:
- external gpio for optional receiver-enable handling

Link: https://lore.kernel.org/all/20200517215610.2131618-1-heiko@sntech.de/
---
Farouk Bouabid (4):
      dt-bindings: serial: add binding for rs485 rx-enable state when rs485 is disabled
      serial: 8250: set rx-enable gpio state when rs485 is disabled
      arm64: dts: rockchip: rk3399-puma-haikou: add rs485 support on uart2
      arm64: dts: rockchip: px30-ringneck-haikou: add rs485 support on uart5

Heiko Stuebner (2):
      dt-bindings: serial: Add binding for rs485 receiver enable GPIO
      serial: 8250: Support separate rs485 rx-enable GPIO

 Documentation/devicetree/bindings/serial/rs485.yaml   |  9 +++++++++
 arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts |  2 ++
 arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts   |  4 +++-
 drivers/tty/serial/8250/8250_port.c                   | 11 ++++++++++-
 drivers/tty/serial/serial_core.c                      | 12 ++++++++++++
 include/linux/serial_core.h                           |  2 ++
 6 files changed, 38 insertions(+), 2 deletions(-)
---
base-commit: 5ebe731c2a586b379103f736cd498bcca3cf1ea9
change-id: 20240125-dev-rx-enable-d8818dbf7c28

Best regards,
-- 
Farouk Bouabid <farouk.bouabid@theobroma-systems.com>

[PATCH v4 1/6] dt-bindings: serial: Add binding for rs485 receiver enable GPIO

[Farouk Bouabid]

From: Heiko Stuebner <heiko.stuebner@cherry.de>

RS485 has two signals to control transmissions "driver enable" (DE) and
"receiver enable" (RE). DE is already handled via the uarts RTS signal
while the RE signal on most implementations doesn't get handled
separately at all.

As there still will be cases where this is needed though add a gpio
property for declaring this signal pin.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
---
 Documentation/devicetree/bindings/serial/rs485.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml
index 9418fd66a8e9..b64577036b5c 100644
--- a/Documentation/devicetree/bindings/serial/rs485.yaml
+++ b/Documentation/devicetree/bindings/serial/rs485.yaml
@@ -51,6 +51,10 @@ properties:
     description: enables the receiving of data even while sending data.
     $ref: /schemas/types.yaml#/definitions/flag
 
+  rs485-rx-enable-gpios:
+    description: GPIO to handle a separate RS485 receive enable signal
+    maxItems: 1
+
   rs485-term-gpios:
     description: GPIO pin to enable RS485 bus termination.
     maxItems: 1

-- 
2.34.1

[PATCH v4 2/6] serial: 8250: Support separate rs485 rx-enable GPIO

[Farouk Bouabid]

From: Heiko Stuebner <heiko.stuebner@cherry.de>

The RE signal is used to control the duplex mode of transmissions,
aka receiving data while sending in full duplex mode, while stopping
receiving data in half-duplex mode.

On a number of boards the !RE signal is tied to ground so reception
is always enabled except if the UART allows disabling the receiver.
This can be taken advantage of to implement half-duplex mode - like
done on 8250_bcm2835aux.

Another solution is to tie !RE to RTS always forcing half-duplex mode.

And finally there is the option to control the RE signal separately,
like done here by introducing a new rs485-specific gpio that can be
set depending on the RX_DURING_TX setting in the common em485 callbacks.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
---
 drivers/tty/serial/8250/8250_port.c | 7 ++++++-
 drivers/tty/serial/serial_core.c    | 6 ++++++
 include/linux/serial_core.h         | 1 +
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index 8ca061d3bbb9..54d8f809b81e 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -1402,6 +1402,7 @@ static void serial8250_stop_rx(struct uart_port *port)
 void serial8250_em485_stop_tx(struct uart_8250_port *p)
 {
 	unsigned char mcr = serial8250_in_MCR(p);
+	struct uart_port *port = &p->port;
 
 	/* Port locked to synchronize UART_IER access against the console. */
 	lockdep_assert_held_once(&p->port.lock);
@@ -1418,6 +1419,7 @@ void serial8250_em485_stop_tx(struct uart_8250_port *p)
 	 * Enable previously disabled RX interrupts.
 	 */
 	if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) {
+		gpiod_set_value(port->rs485_re_gpio, 1);
 		serial8250_clear_and_reinit_fifos(p);
 
 		p->ier |= UART_IER_RLSI | UART_IER_RDI;
@@ -1567,9 +1569,12 @@ static inline void __start_tx(struct uart_port *port)
 void serial8250_em485_start_tx(struct uart_8250_port *up)
 {
 	unsigned char mcr = serial8250_in_MCR(up);
+	struct uart_port *port = &up->port;
 
-	if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX))
+	if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) {
+		gpiod_set_value(port->rs485_re_gpio, 0);
 		serial8250_stop_rx(&up->port);
+	}
 
 	if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
 		mcr |= UART_MCR_RTS;
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index b56ed8c376b2..47aeece985f3 100644
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -3663,6 +3663,12 @@ int uart_get_rs485_mode(struct uart_port *port)
 	if (port->rs485_rx_during_tx_gpio)
 		port->rs485_supported.flags |= SER_RS485_RX_DURING_TX;
 
+	if (IS_ERR(port->rs485_re_gpio)) {
+		ret = PTR_ERR(port->rs485_re_gpio);
+		port->rs485_re_gpio = NULL;
+		return dev_err_probe(dev, ret, "Cannot get rs485-rx-enable-gpios\n");
+	}
+
 	return 0;
 }
 EXPORT_SYMBOL_GPL(uart_get_rs485_mode);
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 536b2581d3e2..364583203a24 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -584,6 +584,7 @@ struct uart_port {
 	struct serial_rs485	rs485_supported;	/* Supported mask for serial_rs485 */
 	struct gpio_desc	*rs485_term_gpio;	/* enable RS485 bus termination */
 	struct gpio_desc	*rs485_rx_during_tx_gpio; /* Output GPIO that sets the state of RS485 RX during TX */
+	struct gpio_desc	*rs485_re_gpio;		/* gpio RS485 receive enable */
 	struct serial_iso7816   iso7816;
 	void			*private_data;		/* generic platform data pointer */
 };

-- 
2.34.1

[PATCH v4 3/6] dt-bindings: serial: add binding for rs485 rx-enable state when rs485 is disabled

[Farouk Bouabid]

RS485 can have a receiver-enable gpio (rx-enable-gpios). When rs485 is
enabled, this gpio, if provided, must be driven active while receiving.
However when RS485 is disabled this gpio should not have an undefined
state. In that case, as DE and RE pins can be connected both to this gpio,
if its state is not properly defined, can cause unexpected transceiver
behavior.
This binding depend on rx-enable-gpios to be implemented.

Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
---
 Documentation/devicetree/bindings/serial/rs485.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml
index b64577036b5c..4c79dfaaf460 100644
--- a/Documentation/devicetree/bindings/serial/rs485.yaml
+++ b/Documentation/devicetree/bindings/serial/rs485.yaml
@@ -55,6 +55,11 @@ properties:
     description: GPIO to handle a separate RS485 receive enable signal
     maxItems: 1
 
+  rs485-rx-enable-inactive-when-rs485-disabled:
+    description: rx-enable GPIO is not active when RS485 is disabled. If missing, active-state
+      is assumed.
+    $ref: /schemas/types.yaml#/definitions/flag
+
   rs485-term-gpios:
     description: GPIO pin to enable RS485 bus termination.
     maxItems: 1

-- 
2.34.1

[PATCH v4 4/6] serial: 8250: set rx-enable gpio state when rs485 is disabled

[Farouk Bouabid]

Add the possibility to de-activate rx-enable gpio when rs485 is disabled.
This defines the state of RE or DE/RE signal when em485 is disabled.

Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
---
 drivers/tty/serial/8250/8250_port.c | 4 ++++
 drivers/tty/serial/serial_core.c    | 6 ++++++
 include/linux/serial_core.h         | 1 +
 3 files changed, 11 insertions(+)

diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index 54d8f809b81e..fbd0212d2397 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -582,12 +582,16 @@ static int serial8250_em485_init(struct uart_8250_port *p)
  */
 void serial8250_em485_destroy(struct uart_8250_port *p)
 {
+	struct uart_port *port = &p->port;
+
 	if (!p->em485)
 		return;
 
 	hrtimer_cancel(&p->em485->start_tx_timer);
 	hrtimer_cancel(&p->em485->stop_tx_timer);
 
+	gpiod_set_value(port->rs485_re_gpio, !port->rs485_re_gpio_inactive_when_rs485_disabled);
+
 	kfree(p->em485);
 	p->em485 = NULL;
 }
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index 47aeece985f3..6460646cf83c 100644
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -3663,6 +3663,12 @@ int uart_get_rs485_mode(struct uart_port *port)
 	if (port->rs485_rx_during_tx_gpio)
 		port->rs485_supported.flags |= SER_RS485_RX_DURING_TX;
 
+	port->rs485_re_gpio_inactive_when_rs485_disabled = device_property_read_bool(dev,
+		"rs485-rx-enable-inactive-when-rs485-disabled");
+
+	port->rs485_re_gpio = devm_gpiod_get_optional(dev, "rs485-rx-enable",
+		port->rs485_re_gpio_inactive_when_rs485_disabled ? GPIOD_OUT_LOW : GPIOD_OUT_HIGH);
+
 	if (IS_ERR(port->rs485_re_gpio)) {
 		ret = PTR_ERR(port->rs485_re_gpio);
 		port->rs485_re_gpio = NULL;
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 364583203a24..fa5a92b56360 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -585,6 +585,7 @@ struct uart_port {
 	struct gpio_desc	*rs485_term_gpio;	/* enable RS485 bus termination */
 	struct gpio_desc	*rs485_rx_during_tx_gpio; /* Output GPIO that sets the state of RS485 RX during TX */
 	struct gpio_desc	*rs485_re_gpio;		/* gpio RS485 receive enable */
+	bool	rs485_re_gpio_inactive_when_rs485_disabled;
 	struct serial_iso7816   iso7816;
 	void			*private_data;		/* generic platform data pointer */
 };

-- 
2.34.1

[PATCH v4 5/6] arm64: dts: rockchip: rk3399-puma-haikou: add rs485 support on uart2

[Farouk Bouabid]

A hardware switch can set the rs485 transceiver into half or full duplex
mode.

Switching to the half-duplex mode requires the user to enable em485 on
uart2 using ioctl, DE/RE are both connected to GPIO2_C3 which is the
RTS signal for uart0. Which means GPIO2_C3 is implemented as rs485
rx-enable gpio.

In full-duplex mode (em485 is disabled), DE is connected to GPIO2_C3 and
RE is grounded (enabled). This requires rx-enable gpio to be inactive to
enable DE as well.

Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
index 18a98c4648ea..576024c745ed 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
@@ -273,11 +273,13 @@ &u2phy0_host {
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+	pinctrl-0 = <&uart0_xfer>;
 	status = "okay";
 };
 
 &uart2 {
+	rs485-rx-enable-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
+	rs485-rx-enable-inactive-when-rs485-disabled;
 	status = "okay";
 };
 

-- 
2.34.1

[PATCH v4 6/6] arm64: dts: rockchip: px30-ringneck-haikou: add rs485 support on uart5

[Farouk Bouabid]

A hardware switch can set the rs485 transceiver into half or full duplex
mode.

Switching to the half-duplex mode requires the user to enable em485 on
uart5 using ioctl, DE/RE are both connected to GPIO0_B5 which is the
RTS signal for uart5. Which means GPIO0_B5 is implemented as rs485
rx-enable gpio.

In full-duplex mode (em485 is disabled), DE is connected to GPIO0_B5 and
RE is grounded (active). This requires rx-enable gpio to be inactive to
enable DE as well.

Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
---
 arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
index 16798eb77077..369a6518a487 100644
--- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
@@ -227,6 +227,8 @@ &uart0 {
 
 &uart5 {
 	pinctrl-0 = <&uart5_xfer>;
+	rs485-rx-enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>;
+	rs485-rx-enable-inactive-when-rs485-disabled;
 	status = "okay";
 };
 

-- 
2.34.1

Re: [PATCH v4 3/6] dt-bindings: serial: add binding for rs485 rx-enable state when rs485 is disabled

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1659 bytes --]

On Fri, Jan 26, 2024 at 03:55:12PM +0100, Farouk Bouabid wrote:
> RS485 can have a receiver-enable gpio (rx-enable-gpios). When rs485 is
> enabled, this gpio, if provided, must be driven active while receiving.
> However when RS485 is disabled this gpio should not have an undefined
> state. In that case, as DE and RE pins can be connected both to this gpio,
> if its state is not properly defined, can cause unexpected transceiver
> behavior.
> This binding depend on rx-enable-gpios to be implemented.

Why do you need a dedicated property for this when there exists a device
specific compatible for the uart on both of the affected rockchip
systems?

Thanks,
Conor.

> 
> Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
> ---
>  Documentation/devicetree/bindings/serial/rs485.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml
> index b64577036b5c..4c79dfaaf460 100644
> --- a/Documentation/devicetree/bindings/serial/rs485.yaml
> +++ b/Documentation/devicetree/bindings/serial/rs485.yaml
> @@ -55,6 +55,11 @@ properties:
>      description: GPIO to handle a separate RS485 receive enable signal
>      maxItems: 1
>  
> +  rs485-rx-enable-inactive-when-rs485-disabled:
> +    description: rx-enable GPIO is not active when RS485 is disabled. If missing, active-state
> +      is assumed.
> +    $ref: /schemas/types.yaml#/definitions/flag
> +
>    rs485-term-gpios:
>      description: GPIO pin to enable RS485 bus termination.
>      maxItems: 1
> 
> -- 
> 2.34.1
> 

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Re: [PATCH v4 3/6] dt-bindings: serial: add binding for rs485 rx-enable state when rs485 is disabled

[Quentin Schulz]

Hi Conor,

On 1/28/24 18:38, Conor Dooley wrote:
> On Fri, Jan 26, 2024 at 03:55:12PM +0100, Farouk Bouabid wrote:
>> RS485 can have a receiver-enable gpio (rx-enable-gpios). When rs485 is
>> enabled, this gpio, if provided, must be driven active while receiving.
>> However when RS485 is disabled this gpio should not have an undefined
>> state. In that case, as DE and RE pins can be connected both to this gpio,
>> if its state is not properly defined, can cause unexpected transceiver
>> behavior.
>> This binding depend on rx-enable-gpios to be implemented.
> 
> Why do you need a dedicated property for this when there exists a device
> specific compatible for the uart on both of the affected rockchip
> systems?
> 

This has nothing to do with Rockchip's IP but the HW design of our 
carrierboard, so using the "rockchip,px30-uart" for that (which I assume 
is what was suggested here?) is incorrect since it'll also apply to 
PX30, RK3399 and RK3588-based Q7 SoCs we manufacture.

Did I understand the suggestion correctly?

Cheers,
Quentin

Re: [PATCH v4 3/6] dt-bindings: serial: add binding for rs485 rx-enable state when rs485 is disabled

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1486 bytes --]

On Mon, Jan 29, 2024 at 01:26:51PM +0100, Quentin Schulz wrote:
> Hi Conor,
> 
> On 1/28/24 18:38, Conor Dooley wrote:
> > On Fri, Jan 26, 2024 at 03:55:12PM +0100, Farouk Bouabid wrote:
> > > RS485 can have a receiver-enable gpio (rx-enable-gpios). When rs485 is
> > > enabled, this gpio, if provided, must be driven active while receiving.
> > > However when RS485 is disabled this gpio should not have an undefined
> > > state. In that case, as DE and RE pins can be connected both to this gpio,
> > > if its state is not properly defined, can cause unexpected transceiver
> > > behavior.
> > > This binding depend on rx-enable-gpios to be implemented.
> > 
> > Why do you need a dedicated property for this when there exists a device
> > specific compatible for the uart on both of the affected rockchip
> > systems?
> > 
> 
> This has nothing to do with Rockchip's IP but the HW design of our
> carrierboard, so using the "rockchip,px30-uart" for that (which I assume is
> what was suggested here?) is incorrect since it'll also apply to PX30,
> RK3399 and RK3588-based Q7 SoCs we manufacture.
> 
> Did I understand the suggestion correctly?

Yes you did. That explanation for not being able to use the compatibles
makes sense. However, I can't give you an ack, because reading the
commit message gives me the same feeling as looking at this photo:
https://www.reddit.com/r/pics/comments/f8jyuz/nothing_in_this_image_is_identifiable/

Sorry,
Conor.

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