From: Yixun Lan <dlan@gentoo.org>
To: Inochi Amaoto <inochiama@outlook.com>
Cc: Chao Wei <chao.wei@sophgo.com>,
Chen Wang <unicorn_wang@outlook.com>,
Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Jisheng Zhang <jszhang@kernel.org>,
Liu Gui <kenneth.liu@sophgo.com>,
Jingbao Qiu <qiujingbao.dlmu@gmail.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices
Date: Mon, 29 Jan 2024 03:01:15 +0000 [thread overview]
Message-ID: <20240129030115.GB1097489@ofsar> (raw)
In-Reply-To: <IA1PR20MB4953654F150743B649D5ADCEBB7E2@IA1PR20MB4953.namprd20.prod.outlook.com>
Hi Inochi Amaoto
On 10:26 Mon 29 Jan , Inochi Amaoto wrote:
> Add spi devices for the CV180x, CV181x and SG200x soc.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> ---
> arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 44 ++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 7c88cbe8e91d..e66f9e9feb48 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -176,6 +176,50 @@ uart3: serial@4170000 {
> status = "disabled";
> };
>
> + spi0: spi@4180000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x04180000 0x10000>;
> + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI0>;
> + clock-names = "ssi_clk", "pclk";
..
> + #address-cells = <1>;
> + #size-cells = <0>;
I'd suggest moving those two above 'interrupts' property
there is an ongoing discussion here..
https://lore.kernel.org/all/20231203174622.18402-1-krzysztof.kozlowski@linaro.org/
> + status = "disabled";
> + };
> +
> + spi1: spi@4190000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x04190000 0x10000>;
> + interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI1>;
> + clock-names = "ssi_clk", "pclk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + spi2: spi@41a0000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x041a0000 0x10000>;
> + interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI2>;
> + clock-names = "ssi_clk", "pclk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + spi3: spi@41b0000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x041b0000 0x10000>;
> + interrupts = <57 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI3>;
> + clock-names = "ssi_clk", "pclk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> uart4: serial@41c0000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x041c0000 0x100>;
> --
> 2.43.0
--
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55
next prev parent reply other threads:[~2024-01-29 3:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-29 2:23 [PATCH 0/2] riscv: sophgo: add i2c and spi device to CV180x/SG2000x SoCs Inochi Amaoto
2024-01-29 2:26 ` [PATCH 1/2] riscv: dts: sophgo: cv18xx: Add spi devices Inochi Amaoto
2024-01-29 3:01 ` Yixun Lan [this message]
2024-01-29 3:47 ` Inochi Amaoto
2024-01-29 15:40 ` Conor Dooley
2024-01-29 2:26 ` [PATCH 2/2] riscv: dts: sophgo: cv18xx: Add i2c devices Inochi Amaoto
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