From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 375248C1D; Mon, 12 Feb 2024 08:13:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707725609; cv=none; b=uuAnBIkAKLreDgjjS8tBsRL/BPcutu1J6rmHNNCffdpHSvNHTlvwalKGOyVizeCltNtpn3sVJbeJZG68KGepybRbPjzqYmVS9Og29nddfviH6ncgpQSB02QTDf/CwVkD2uMIAu7IGk0609Ca3wpbt6x/CSu06H9hB8jdNOaCBXs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707725609; c=relaxed/simple; bh=UCSj1ZEGLD9eCgnsZic6xGWJaBob8bewMfF1q0KeXLU=; h=Date:From:To:CC:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=mIo73Sw/0d4QUfFxQhmeKrqQFrLC2gpMIAbYfhGXBwWGwb8XDiz0TXhHe6QoDZLI+YSPW4TcMiPw0wwuibpwlCpJnDOGqw6MgQVtWZqP4zpIKM1FvExFitPIlGk8eNldgHEN+EFN60GAXxy8at1nBRgz7VkGT3/m/PWY1RWppkE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=QVj9j8Y9; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="QVj9j8Y9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707725608; x=1739261608; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=UCSj1ZEGLD9eCgnsZic6xGWJaBob8bewMfF1q0KeXLU=; b=QVj9j8Y9KSbeLhmGN/Ffoxr939HKArEbSh88JZ14d1NO5B57BtOfaAiv fwvYMfX2Q0hUOINF8HRMZouEPedhU45q8J9bkzW4ye1zTFJqLFtr8U0Rb Zxs+27xxIS91f2DChj0lvu3qmz+1z5Ugq3MN6TdnDhVptCeNJltlrhiFk o0+P1C51r8k4KGmtMCzODpNT3fsJ6YT0L7zY1KoXFGkj5kcz/n5VKTBRw lcwsbLFJB2d8LDWr8L431D9uSsxHd4CP7aKx7GB60J/OF9em5pto2QoCX 8lzrkUU5ZfsDiP5O/Q1adJnXU2rlcSDKF8x5G7O6/lhIuWdAX9u2aK2Xb w==; X-CSE-ConnectionGUID: SPzSOg2CQl+AOMlhbWcqbA== X-CSE-MsgGUID: oaTEeq14QP2PPao9cFSn5w== X-IronPort-AV: E=Sophos;i="6.05,262,1701154800"; d="asc'?scan'208";a="183365843" X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 Feb 2024 01:13:26 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 12 Feb 2024 01:13:16 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Mon, 12 Feb 2024 01:13:13 -0700 Date: Mon, 12 Feb 2024 08:12:33 +0000 From: Conor Dooley To: Inochi Amaoto CC: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang , Liu Gui , Jingbao Qiu , , , , , Subject: Re: [PATCH v7 4/8] clk: sophgo: Add clock support for CV1800 SoC Message-ID: <20240212-explicit-wrecking-f158f0c28f0d@wendy> References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="dvFkdGZI6Ityus2U" Content-Disposition: inline In-Reply-To: --dvFkdGZI6Ityus2U Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Feb 08, 2024 at 04:48:52PM +0800, Inochi Amaoto wrote: > Add clock definition and init code for CV1800 SoC. >=20 > Signed-off-by: Inochi Amaoto > Link: https://github.com/milkv-duo/duo-files/blob/6f4e9b8ecb459e017cca1a8= df248a19ca70837a3/duo/datasheet/CV180X-Clock-v1.xlsx And on this one there's a gcc complaint too: drivers/clk/sophgo/clk-cv1800.c:634:37: warning: 'clk_disp_vip_parents' def= ined but not used [-Wunused-const-variable=3D] Cheers, Conor. --dvFkdGZI6Ityus2U Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZcnS8QAKCRB4tDGHoIJi 0syHAQD+X8u58YILVwXnuv/2aD2GJ/8Q6x2gEhvtWKxRtepANAEAtV2v+waW9yzK W7onJ9rSw1Jr6B4+gjOSjb49MiESgwE= =leOw -----END PGP SIGNATURE----- --dvFkdGZI6Ityus2U--