From: Rob Herring <robh@kernel.org>
To: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: broonie@kernel.org, andi.shyti@kernel.org,
krzysztof.kozlowski@linaro.org, semen.protsenko@linaro.org,
conor+dt@kernel.org, alim.akhtar@samsung.com,
linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, andre.draszik@linaro.org,
peter.griffin@linaro.org, kernel-team@android.com,
willmcvicker@google.com, devicetree@vger.kernel.org,
arnd@arndb.de
Subject: Re: [PATCH v2 01/12] spi: dt-bindings: introduce FIFO depth properties
Date: Tue, 13 Feb 2024 07:14:05 -0600 [thread overview]
Message-ID: <20240213131405.GA1047438-robh@kernel.org> (raw)
In-Reply-To: <20240212140331.915498-2-tudor.ambarus@linaro.org>
On Mon, Feb 12, 2024 at 02:03:20PM +0000, Tudor Ambarus wrote:
> There are SPI IPs that can be configured by the integrator with a
> specific FIFO depth depending on the system's capabilities. For example,
> the samsung USI SPI IP can be configured by the integrator with a TX/RX
> FIFO from 8 byte to 256 bytes.
>
> Introduce the ``fifo-depth`` property for such instances of IPs where the
> same FIFO depth is used for both RX and TX. Introduce ``rx-fifo-depth``
> and ``tx-fifo-depth`` properties for cases where the RX FIFO depth is
> different from the TX FIFO depth.
>
> Make the dedicated RX/TX properties dependent on each other and mutual
> exclusive with the other.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
> .../bindings/spi/spi-controller.yaml | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
With the indentation fixed,
Reviewed-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2024-02-13 13:14 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-12 14:03 [PATCH v2 00/12] spi: s3c64xx: remove OF alias ID dependency Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 01/12] spi: dt-bindings: introduce FIFO depth properties Tudor Ambarus
2024-02-12 15:36 ` Rob Herring
2024-02-13 8:16 ` Tudor Ambarus
2024-02-13 13:14 ` Rob Herring [this message]
2024-02-16 7:41 ` kernel test robot
2024-02-12 14:03 ` [PATCH v2 02/12] spi: s3c64xx: define a magic value Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 03/12] spi: s3c64xx: allow full FIFO masks Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 04/12] spi: s3c64xx: determine the fifo depth only once Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 05/12] spi: s3c64xx: retrieve the FIFO depth from the device tree Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 06/12] spi: s3c64xx: allow FIFO depth to be determined from the compatible Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 07/12] spi: s3c64xx: let the SPI core determine the bus number Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 08/12] spi: s3c64xx: introduce s3c64xx_spi_set_port_id() Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 09/12] spi: s3c64xx: get rid of the OF alias ID dependency Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 10/12] spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_id Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 11/12] spi: s3c64xx: switch gs101 to new port config data Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 12/12] spi: s3c64xx: switch exynos850 " Tudor Ambarus
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