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From: Tony Lindgren <tony@atomide.com>
To: Andrzej Hajda <andrzej.hajda@intel.com>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Robert Foss <rfoss@kernel.org>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Jonas Karlman <jonas@kwiboo.se>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, Simha BN <simhavcs@gmail.com>,
	Sam Ravnborg <sam@ravnborg.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Michael Walle <mwalle@kernel.org>,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org
Subject: [PATCH v4 10/10] drm/bridge: tc358775: Configure hs_rate and lp_rate
Date: Thu, 15 Feb 2024 14:31:53 +0200	[thread overview]
Message-ID: <20240215123222.42609-11-tony@atomide.com> (raw)
In-Reply-To: <20240215123222.42609-1-tony@atomide.com>

The hs_rate and lp_rate may be used by the dsi host for timing
calculations. The tc358775 has a maximum bit rate of 1 Gbps/lane,
tc358765 has maximurate of 800 Mbps per lane.

Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 drivers/gpu/drm/bridge/tc358775.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c
--- a/drivers/gpu/drm/bridge/tc358775.c
+++ b/drivers/gpu/drm/bridge/tc358775.c
@@ -637,6 +637,19 @@ static int tc_attach_host(struct tc_data *tc)
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
 			  MIPI_DSI_MODE_LPM;
 
+	/*
+	 * The hs_rate and lp_rate are data rate values. The HS mode is
+	 * differential, while the LP mode is single ended. As the HS mode
+	 * uses DDR, the DSI clock frequency is half the hs_rate. The 10 Mbs
+	 * data rate for LP mode is not specified in the bridge data sheet,
+	 * but seems to be part of the MIPI DSI spec.
+	 */
+	if (tc->type == TC358765)
+		dsi->hs_rate = 800000000;
+	else
+		dsi->hs_rate = 1000000000;
+	dsi->lp_rate = 10000000;
+
 	ret = devm_mipi_dsi_attach(dev, dsi);
 	if (ret < 0) {
 		dev_err(dev, "failed to attach dsi to host\n");
-- 
2.43.1

      parent reply	other threads:[~2024-02-15 12:41 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-15 12:31 [PATCH v4 00/10] Improvments for tc358775 with support for tc358765 Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 01/10] dt-bindings: display: bridge: tc358775: make stby gpio optional Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 02/10] dt-bindings: display: bridge: tc358775: Add data-lanes Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 03/10] dt-bindings: display: bridge: tc358775: Add support for tc358765 Tony Lindgren
2024-02-15 18:43   ` Krzysztof Kozlowski
2024-02-25  6:11     ` Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 04/10] drm/bridge: tc358775: fix support for jeida-18 and jeida-24 Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 05/10] drm/bridge: tc358775: make standby GPIO optional Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 06/10] drm/bridge: tc358775: Get bridge data lanes instead of the DSI host lanes Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 07/10] drm/bridge: tc358775: Add burst and low-power modes Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 08/10] drm/bridge: tc358775: Enable pre_enable_prev_first flag Tony Lindgren
2024-02-15 12:31 ` [PATCH v4 09/10] drm/bridge: tc358775: Add support for tc358765 Tony Lindgren
2024-02-15 12:31 ` Tony Lindgren [this message]

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