From: Sam Protsenko <semen.protsenko@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Tomasz Figa <tomasz.figa@gmail.com>,
linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 10/16] clk: samsung: Keep CPU clock chip specific data in a dedicated struct
Date: Fri, 16 Feb 2024 16:32:39 -0600 [thread overview]
Message-ID: <20240216223245.12273-11-semen.protsenko@linaro.org> (raw)
In-Reply-To: <20240216223245.12273-1-semen.protsenko@linaro.org>
Keep chip specific data in the data structure, don't mix it with code.
It makes it easier to add more chip specific data further.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
drivers/clk/samsung/clk-cpu.c | 40 +++++++++++++++++++++++------------
1 file changed, 26 insertions(+), 14 deletions(-)
diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c
index 21998c89b96d..04394d2166c9 100644
--- a/drivers/clk/samsung/clk-cpu.c
+++ b/drivers/clk/samsung/clk-cpu.c
@@ -42,6 +42,16 @@ struct exynos_cpuclk;
typedef int (*exynos_rate_change_fn_t)(struct clk_notifier_data *ndata,
struct exynos_cpuclk *cpuclk);
+/**
+ * struct exynos_cpuclk_chip - Chip specific data for CPU clock
+ * @pre_rate_cb: callback to run before CPU clock rate change
+ * @post_rate_cb: callback to run after CPU clock rate change
+ */
+struct exynos_cpuclk_chip {
+ exynos_rate_change_fn_t pre_rate_cb;
+ exynos_rate_change_fn_t post_rate_cb;
+};
+
/**
* struct exynos_cpuclk - information about clock supplied to a CPU core
* @hw: handle between CCF and CPU clock
@@ -54,8 +64,7 @@ typedef int (*exynos_rate_change_fn_t)(struct clk_notifier_data *ndata,
* @clk_nb: clock notifier registered for changes in clock speed of the
* primary parent clock
* @flags: configuration flags for the CPU clock
- * @pre_rate_cb: callback to run before CPU clock rate change
- * @post_rate_cb: callback to run after CPU clock rate change
+ * @chip: chip-specific data for the CPU clock
*
* This structure holds information required for programming the CPU clock for
* various clock speeds.
@@ -69,9 +78,7 @@ struct exynos_cpuclk {
const unsigned long num_cfgs;
struct notifier_block clk_nb;
unsigned long flags;
-
- exynos_rate_change_fn_t pre_rate_cb;
- exynos_rate_change_fn_t post_rate_cb;
+ const struct exynos_cpuclk_chip *chip;
};
/* ---- Common code --------------------------------------------------------- */
@@ -419,13 +426,24 @@ static int exynos_cpuclk_notifier_cb(struct notifier_block *nb,
cpuclk = container_of(nb, struct exynos_cpuclk, clk_nb);
if (event == PRE_RATE_CHANGE)
- err = cpuclk->pre_rate_cb(ndata, cpuclk);
+ err = cpuclk->chip->pre_rate_cb(ndata, cpuclk);
else if (event == POST_RATE_CHANGE)
- err = cpuclk->post_rate_cb(ndata, cpuclk);
+ err = cpuclk->chip->post_rate_cb(ndata, cpuclk);
return notifier_from_errno(err);
}
+static const struct exynos_cpuclk_chip exynos_clkcpu_chips[] = {
+ [CPUCLK_LAYOUT_E4210] = {
+ .pre_rate_cb = exynos_cpuclk_pre_rate_change,
+ .post_rate_cb = exynos_cpuclk_post_rate_change,
+ },
+ [CPUCLK_LAYOUT_E5433] = {
+ .pre_rate_cb = exynos5433_cpuclk_pre_rate_change,
+ .post_rate_cb = exynos5433_cpuclk_post_rate_change,
+ },
+};
+
/* helper function to register a CPU clock */
static int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx,
const struct samsung_cpu_clock *clk_data)
@@ -464,13 +482,7 @@ static int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx,
cpuclk->lock = &ctx->lock;
cpuclk->flags = clk_data->flags;
cpuclk->clk_nb.notifier_call = exynos_cpuclk_notifier_cb;
- if (clk_data->reg_layout == CPUCLK_LAYOUT_E5433) {
- cpuclk->pre_rate_cb = exynos5433_cpuclk_pre_rate_change;
- cpuclk->post_rate_cb = exynos5433_cpuclk_post_rate_change;
- } else {
- cpuclk->pre_rate_cb = exynos_cpuclk_pre_rate_change;
- cpuclk->post_rate_cb = exynos_cpuclk_post_rate_change;
- }
+ cpuclk->chip = &exynos_clkcpu_chips[clk_data->reg_layout];
ret = clk_notifier_register(parent->clk, &cpuclk->clk_nb);
if (ret) {
--
2.39.2
next prev parent reply other threads:[~2024-02-16 22:32 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-16 22:32 [PATCH 00/16] clk: samsung: Add CPU clocks for Exynos850 Sam Protsenko
2024-02-16 22:32 ` [PATCH 01/16] dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1 Sam Protsenko
2024-02-16 22:32 ` [PATCH 02/16] clk: samsung: Improve clk-cpu.c style Sam Protsenko
2024-02-16 22:32 ` [PATCH 03/16] clk: samsung: Pull struct exynos_cpuclk into clk-cpu.c Sam Protsenko
2024-02-16 22:32 ` [PATCH 04/16] clk: samsung: Reduce params count in exynos_register_cpu_clock() Sam Protsenko
2024-02-16 22:32 ` [PATCH 05/16] clk: samsung: Use single CPU clock notifier callback for all chips Sam Protsenko
2024-02-16 22:32 ` [PATCH 06/16] clk: samsung: Group CPU clock functions by chip Sam Protsenko
2024-02-16 22:32 ` [PATCH 07/16] clk: samsung: Pass actual clock controller base address to CPU_CLK() Sam Protsenko
2024-02-20 10:53 ` Krzysztof Kozlowski
2024-02-21 23:41 ` Sam Protsenko
2024-02-16 22:32 ` [PATCH 08/16] clk: samsung: Use clk.h as a single header for Samsung CCF Sam Protsenko
2024-02-20 10:55 ` Krzysztof Kozlowski
2024-02-16 22:32 ` [PATCH 09/16] clk: samsung: Pass register layout type explicitly to CLK_CPU() Sam Protsenko
2024-02-20 10:56 ` Krzysztof Kozlowski
2024-02-16 22:32 ` Sam Protsenko [this message]
2024-02-16 22:32 ` [PATCH 11/16] clk: samsung: Keep register offsets in chip specific structure Sam Protsenko
2024-02-20 11:04 ` Krzysztof Kozlowski
2024-02-22 0:42 ` Sam Protsenko
2024-02-22 7:47 ` Krzysztof Kozlowski
2024-02-24 19:57 ` Sam Protsenko
2024-02-16 22:32 ` [PATCH 12/16] clk: samsung: Pass mask to wait_until_mux_stable() Sam Protsenko
2024-02-16 22:32 ` [PATCH 13/16] clk: samsung: Add CPU clock support for Exynos850 Sam Protsenko
2024-02-16 22:32 ` [PATCH 14/16] clk: samsung: Implement manual PLL control for ARM64 SoCs Sam Protsenko
2024-02-16 22:32 ` [PATCH 15/16] clk: samsung: exynos850: Add CMU_CPUCL0 and CMU_CPUCL1 Sam Protsenko
2024-02-16 22:32 ` [PATCH 16/16] arm64: dts: exynos: Add CPU clocks Sam Protsenko
2024-02-20 11:07 ` [PATCH 00/16] clk: samsung: Add CPU clocks for Exynos850 Krzysztof Kozlowski
2024-02-21 23:07 ` Sam Protsenko
2024-02-22 7:45 ` Krzysztof Kozlowski
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