* [PATCH 0/4] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs
@ 2024-02-20 10:25 Inochi Amaoto
2024-02-20 10:28 ` [PATCH v2 1/4] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Inochi Amaoto
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Inochi Amaoto @ 2024-02-20 10:25 UTC (permalink / raw)
To: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Inochi Amaoto
Cc: Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine,
devicetree, linux-kernel
Add dma multiplexer support for the Sophgo CV1800/SG2000 SoCs.
The patch include the following patch:
http://lore.kernel.org/linux-riscv/PH7PR20MB4962F822A64CB127911978AABB4E2@PH7PR20MB4962.namprd20.prod.outlook.com/
Changed from v2:
1. fix wrong title of patch 2.
Inochi Amaoto (4):
dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC
dt-bindings: soc: sophgo: Add top misc controller of CV18XX/SG200X
series SoC
soc/sophgo: add top sysctrl layout file for CV18XX/SG200X
dmaengine: add driver for Sophgo CV18XX/SG200X dmamux
.../bindings/dma/sophgo,cv1800-dmamux.yaml | 44 ++++
.../soc/sophgo/sophgo,cv1800-top-syscon.yaml | 48 ++++
drivers/dma/Kconfig | 9 +
drivers/dma/Makefile | 1 +
drivers/dma/cv1800-dmamux.c | 232 ++++++++++++++++++
include/dt-bindings/dma/cv1800-dma.h | 55 +++++
include/soc/sophgo/cv1800-sysctl.h | 30 +++
7 files changed, 419 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml
create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml
create mode 100644 drivers/dma/cv1800-dmamux.c
create mode 100644 include/dt-bindings/dma/cv1800-dma.h
create mode 100644 include/soc/sophgo/cv1800-sysctl.h
--
2.43.2
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH v2 1/4] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC 2024-02-20 10:25 [PATCH 0/4] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto @ 2024-02-20 10:28 ` Inochi Amaoto 2024-02-23 0:32 ` Rob Herring 2024-02-20 10:28 ` [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of " Inochi Amaoto ` (3 subsequent siblings) 4 siblings, 1 reply; 11+ messages in thread From: Inochi Amaoto @ 2024-02-20 10:28 UTC (permalink / raw) To: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Inochi Amaoto Cc: Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel The DMA IP of Sophgo CV18XX/SG200X is based on a DW AXI CORE, with an additional channel remap register located in the top system control area. The DMA channel is exclusive to each core. Add the dmamux binding for CV18XX/SG200X series SoC Signed-off-by: Inochi Amaoto <inochiama@outlook.com> --- .../bindings/dma/sophgo,cv1800-dmamux.yaml | 44 +++++++++++++++ include/dt-bindings/dma/cv1800-dma.h | 55 +++++++++++++++++++ 2 files changed, 99 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml create mode 100644 include/dt-bindings/dma/cv1800-dma.h diff --git a/Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml b/Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml new file mode 100644 index 000000000000..8bcbf7beb432 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/sophgo,cv1800-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800/SG200 Series DMA mux + +maintainers: + - Inochi Amaoto <inochiama@outlook.com> + +allOf: + - $ref: dma-router.yaml# + +properties: + compatible: + const: sophgo,cv1800-dmamux + + '#dma-cells': + const: 3 + description: + The first cells is DMA channel. The second one is device id. + The third one is the cpu id. + + dma-masters: + maxItems: 1 + + dma-requests: + const: 8 + +required: + - '#dma-cells' + - dma-masters + +additionalProperties: false + +examples: + - | + dma-router { + compatible = "sophgo,cv1800-dmamux"; + #dma-cells = <3>; + dma-masters = <&dmac>; + dma-requests = <8>; + }; diff --git a/include/dt-bindings/dma/cv1800-dma.h b/include/dt-bindings/dma/cv1800-dma.h new file mode 100644 index 000000000000..3ce9dac25259 --- /dev/null +++ b/include/dt-bindings/dma/cv1800-dma.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ + +#ifndef __DT_BINDINGS_DMA_CV1800_H__ +#define __DT_BINDINGS_DMA_CV1800_H__ + +#define DMA_I2S0_RX 0 +#define DMA_I2S0_TX 1 +#define DMA_I2S1_RX 2 +#define DMA_I2S1_TX 3 +#define DMA_I2S2_RX 4 +#define DMA_I2S2_TX 5 +#define DMA_I2S3_RX 6 +#define DMA_I2S3_TX 7 +#define DMA_UART0_RX 8 +#define DMA_UART0_TX 9 +#define DMA_UART1_RX 10 +#define DMA_UART1_TX 11 +#define DMA_UART2_RX 12 +#define DMA_UART2_TX 13 +#define DMA_UART3_RX 14 +#define DMA_UART3_TX 15 +#define DMA_SPI0_RX 16 +#define DMA_SPI0_TX 17 +#define DMA_SPI1_RX 18 +#define DMA_SPI1_TX 19 +#define DMA_SPI2_RX 20 +#define DMA_SPI2_TX 21 +#define DMA_SPI3_RX 22 +#define DMA_SPI3_TX 23 +#define DMA_I2C0_RX 24 +#define DMA_I2C0_TX 25 +#define DMA_I2C1_RX 26 +#define DMA_I2C1_TX 27 +#define DMA_I2C2_RX 28 +#define DMA_I2C2_TX 29 +#define DMA_I2C3_RX 30 +#define DMA_I2C3_TX 31 +#define DMA_I2C4_RX 32 +#define DMA_I2C4_TX 33 +#define DMA_TDM0_RX 34 +#define DMA_TDM0_TX 35 +#define DMA_TDM1_RX 36 +#define DMA_AUDSRC 37 +#define DMA_SPI_NAND 38 +#define DMA_SPI_NOR 39 +#define DMA_UART4_RX 40 +#define DMA_UART4_TX 41 +#define DMA_SPI_NOR1 42 + +#define DMA_CPU_A53 0 +#define DMA_CPU_C906_0 1 +#define DMA_CPU_C906_1 2 + + +#endif // __DT_BINDINGS_DMA_CV1800_H__ -- 2.43.2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC 2024-02-20 10:28 ` [PATCH v2 1/4] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Inochi Amaoto @ 2024-02-23 0:32 ` Rob Herring 0 siblings, 0 replies; 11+ messages in thread From: Rob Herring @ 2024-02-23 0:32 UTC (permalink / raw) To: Inochi Amaoto Cc: Vinod Koul, linux-kernel, devicetree, Conor Dooley, dmaengine, dlan, Chen Wang, Rob Herring, Krzysztof Kozlowski, Jisheng Zhang, Jingbao Qiu, Liu Gui On Tue, 20 Feb 2024 18:28:58 +0800, Inochi Amaoto wrote: > The DMA IP of Sophgo CV18XX/SG200X is based on a DW AXI CORE, with > an additional channel remap register located in the top system control > area. The DMA channel is exclusive to each core. > > Add the dmamux binding for CV18XX/SG200X series SoC > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > --- > .../bindings/dma/sophgo,cv1800-dmamux.yaml | 44 +++++++++++++++ > include/dt-bindings/dma/cv1800-dma.h | 55 +++++++++++++++++++ > 2 files changed, 99 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml > create mode 100644 include/dt-bindings/dma/cv1800-dma.h > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of CV18XX/SG200X series SoC 2024-02-20 10:25 [PATCH 0/4] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto 2024-02-20 10:28 ` [PATCH v2 1/4] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Inochi Amaoto @ 2024-02-20 10:28 ` Inochi Amaoto 2024-02-23 0:33 ` Rob Herring 2024-02-20 10:29 ` [PATCH v2 3/4] soc/sophgo: add top sysctrl layout file for CV18XX/SG200X Inochi Amaoto ` (2 subsequent siblings) 4 siblings, 1 reply; 11+ messages in thread From: Inochi Amaoto @ 2024-02-20 10:28 UTC (permalink / raw) To: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Inochi Amaoto Cc: Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel CV18XX/SG200X series SoCs have a special top misc system controller, which provides register access for several devices. In addition to register access, this system controller also contains some subdevices (such as dmamux). Add bindings for top misc controller of CV18XX/SG200X series SoC. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> --- .../soc/sophgo/sophgo,cv1800-top-syscon.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml new file mode 100644 index 000000000000..29825fee66d5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,cv1800-top-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800/SG2000 SoC top system controller + +maintainers: + - Inochi Amaoto <inochiama@outlook.com> + +description: + The Sophgo CV1800/SG2000 SoC top misc system controller provides + register access to configure related modules. + +properties: + compatible: + items: + - const: sophgo,cv1800-top-syscon + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + syscon@3000000 { + compatible = "sophgo,cv1800-top-syscon", + "syscon", "simple-mfd"; + reg = <0x03000000 0x1000>; + + dma-router { + compatible = "sophgo,cv1800-dmamux"; + #dma-cells = <3>; + dma-masters = <&dmac>; + dma-requests = <8>; + }; + }; + +... -- 2.43.2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of CV18XX/SG200X series SoC 2024-02-20 10:28 ` [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of " Inochi Amaoto @ 2024-02-23 0:33 ` Rob Herring 2024-02-23 1:47 ` Inochi Amaoto 0 siblings, 1 reply; 11+ messages in thread From: Rob Herring @ 2024-02-23 0:33 UTC (permalink / raw) To: Inochi Amaoto Cc: Vinod Koul, Krzysztof Kozlowski, Conor Dooley, Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel On Tue, Feb 20, 2024 at 06:28:59PM +0800, Inochi Amaoto wrote: > CV18XX/SG200X series SoCs have a special top misc system controller, > which provides register access for several devices. In addition to > register access, this system controller also contains some subdevices > (such as dmamux). > > Add bindings for top misc controller of CV18XX/SG200X series SoC. > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > --- > .../soc/sophgo/sophgo,cv1800-top-syscon.yaml | 48 +++++++++++++++++++ > 1 file changed, 48 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > new file mode 100644 > index 000000000000..29825fee66d5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > @@ -0,0 +1,48 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,cv1800-top-syscon.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo CV1800/SG2000 SoC top system controller > + > +maintainers: > + - Inochi Amaoto <inochiama@outlook.com> > + > +description: > + The Sophgo CV1800/SG2000 SoC top misc system controller provides > + register access to configure related modules. > + > +properties: > + compatible: > + items: > + - const: sophgo,cv1800-top-syscon > + - const: syscon > + - const: simple-mfd > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: > + type: object > + > +examples: > + - | > + syscon@3000000 { > + compatible = "sophgo,cv1800-top-syscon", > + "syscon", "simple-mfd"; > + reg = <0x03000000 0x1000>; > + > + dma-router { Is there no defined register set you can put in 'reg' here? > + compatible = "sophgo,cv1800-dmamux"; > + #dma-cells = <3>; > + dma-masters = <&dmac>; > + dma-requests = <8>; > + }; > + }; > + > +... > -- > 2.43.2 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of CV18XX/SG200X series SoC 2024-02-23 0:33 ` Rob Herring @ 2024-02-23 1:47 ` Inochi Amaoto 2024-02-28 17:07 ` Rob Herring 0 siblings, 1 reply; 11+ messages in thread From: Inochi Amaoto @ 2024-02-23 1:47 UTC (permalink / raw) To: Rob Herring, Inochi Amaoto Cc: Vinod Koul, Krzysztof Kozlowski, Conor Dooley, Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel On Thu, Feb 22, 2024 at 05:33:34PM -0700, Rob Herring wrote: > On Tue, Feb 20, 2024 at 06:28:59PM +0800, Inochi Amaoto wrote: > > CV18XX/SG200X series SoCs have a special top misc system controller, > > which provides register access for several devices. In addition to > > register access, this system controller also contains some subdevices > > (such as dmamux). > > > > Add bindings for top misc controller of CV18XX/SG200X series SoC. > > > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > > --- > > .../soc/sophgo/sophgo,cv1800-top-syscon.yaml | 48 +++++++++++++++++++ > > 1 file changed, 48 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > > > diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > new file mode 100644 > > index 000000000000..29825fee66d5 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > @@ -0,0 +1,48 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,cv1800-top-syscon.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Sophgo CV1800/SG2000 SoC top system controller > > + > > +maintainers: > > + - Inochi Amaoto <inochiama@outlook.com> > > + > > +description: > > + The Sophgo CV1800/SG2000 SoC top misc system controller provides > > + register access to configure related modules. > > + > > +properties: > > + compatible: > > + items: > > + - const: sophgo,cv1800-top-syscon > > + - const: syscon > > + - const: simple-mfd > > + > > + reg: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + > > +additionalProperties: > > + type: object > > + > > +examples: > > + - | > > + syscon@3000000 { > > + compatible = "sophgo,cv1800-top-syscon", > > + "syscon", "simple-mfd"; > > + reg = <0x03000000 0x1000>; > > + > > + dma-router { > > Is there no defined register set you can put in 'reg' here? > It has multiple registers in the syscon. But in fact, the dmamux is a virtual device. And the syscon device only have some discrete registers. This is why I did not put reg. It should access the device using the offset defined in the patch 3. > > + compatible = "sophgo,cv1800-dmamux"; > > + #dma-cells = <3>; > > + dma-masters = <&dmac>; > > + dma-requests = <8>; > > + }; > > + }; > > + > > +... > > -- > > 2.43.2 > > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of CV18XX/SG200X series SoC 2024-02-23 1:47 ` Inochi Amaoto @ 2024-02-28 17:07 ` Rob Herring 2024-02-29 3:25 ` Inochi Amaoto 0 siblings, 1 reply; 11+ messages in thread From: Rob Herring @ 2024-02-28 17:07 UTC (permalink / raw) To: Inochi Amaoto Cc: Vinod Koul, Krzysztof Kozlowski, Conor Dooley, Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel On Fri, Feb 23, 2024 at 09:47:05AM +0800, Inochi Amaoto wrote: > On Thu, Feb 22, 2024 at 05:33:34PM -0700, Rob Herring wrote: > > On Tue, Feb 20, 2024 at 06:28:59PM +0800, Inochi Amaoto wrote: > > > CV18XX/SG200X series SoCs have a special top misc system controller, > > > which provides register access for several devices. In addition to > > > register access, this system controller also contains some subdevices > > > (such as dmamux). > > > > > > Add bindings for top misc controller of CV18XX/SG200X series SoC. > > > > > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > > > --- > > > .../soc/sophgo/sophgo,cv1800-top-syscon.yaml | 48 +++++++++++++++++++ > > > 1 file changed, 48 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > > new file mode 100644 > > > index 000000000000..29825fee66d5 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > > @@ -0,0 +1,48 @@ > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,cv1800-top-syscon.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Sophgo CV1800/SG2000 SoC top system controller > > > + > > > +maintainers: > > > + - Inochi Amaoto <inochiama@outlook.com> > > > + > > > +description: > > > + The Sophgo CV1800/SG2000 SoC top misc system controller provides > > > + register access to configure related modules. > > > + > > > +properties: > > > + compatible: > > > + items: > > > + - const: sophgo,cv1800-top-syscon > > > + - const: syscon > > > + - const: simple-mfd > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > +required: > > > + - compatible > > > + - reg > > > + > > > +additionalProperties: > > > + type: object > > > + > > > +examples: > > > + - | > > > + syscon@3000000 { > > > + compatible = "sophgo,cv1800-top-syscon", > > > + "syscon", "simple-mfd"; > > > + reg = <0x03000000 0x1000>; > > > + > > > + dma-router { > > > > Is there no defined register set you can put in 'reg' here? > > > > It has multiple registers in the syscon. But in fact, the dmamux > is a virtual device. And the syscon device only have some discrete > registers. This is why I did not put reg. It should access the > device using the offset defined in the patch 3. I would add: reg = <0x154 8>, <0x298 0x4>; (with appropriate "ranges" in parent) No requirement for Linux to use this either. Rob ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of CV18XX/SG200X series SoC 2024-02-28 17:07 ` Rob Herring @ 2024-02-29 3:25 ` Inochi Amaoto 0 siblings, 0 replies; 11+ messages in thread From: Inochi Amaoto @ 2024-02-29 3:25 UTC (permalink / raw) To: Rob Herring, Inochi Amaoto Cc: Vinod Koul, Krzysztof Kozlowski, Conor Dooley, Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel On Wed, Feb 28, 2024 at 11:07:58AM -0600, Rob Herring wrote: > On Fri, Feb 23, 2024 at 09:47:05AM +0800, Inochi Amaoto wrote: > > On Thu, Feb 22, 2024 at 05:33:34PM -0700, Rob Herring wrote: > > > On Tue, Feb 20, 2024 at 06:28:59PM +0800, Inochi Amaoto wrote: > > > > CV18XX/SG200X series SoCs have a special top misc system controller, > > > > which provides register access for several devices. In addition to > > > > register access, this system controller also contains some subdevices > > > > (such as dmamux). > > > > > > > > Add bindings for top misc controller of CV18XX/SG200X series SoC. > > > > > > > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > > > > --- > > > > .../soc/sophgo/sophgo,cv1800-top-syscon.yaml | 48 +++++++++++++++++++ > > > > 1 file changed, 48 insertions(+) > > > > create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > > > > > > > diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > > > new file mode 100644 > > > > index 000000000000..29825fee66d5 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800-top-syscon.yaml > > > > @@ -0,0 +1,48 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > > > +%YAML 1.2 > > > > +--- > > > > +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,cv1800-top-syscon.yaml# > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > > + > > > > +title: Sophgo CV1800/SG2000 SoC top system controller > > > > + > > > > +maintainers: > > > > + - Inochi Amaoto <inochiama@outlook.com> > > > > + > > > > +description: > > > > + The Sophgo CV1800/SG2000 SoC top misc system controller provides > > > > + register access to configure related modules. > > > > + > > > > +properties: > > > > + compatible: > > > > + items: > > > > + - const: sophgo,cv1800-top-syscon > > > > + - const: syscon > > > > + - const: simple-mfd > > > > + > > > > + reg: > > > > + maxItems: 1 > > > > + > > > > +required: > > > > + - compatible > > > > + - reg > > > > + > > > > +additionalProperties: > > > > + type: object > > > > + > > > > +examples: > > > > + - | > > > > + syscon@3000000 { > > > > + compatible = "sophgo,cv1800-top-syscon", > > > > + "syscon", "simple-mfd"; > > > > + reg = <0x03000000 0x1000>; > > > > + > > > > + dma-router { > > > > > > Is there no defined register set you can put in 'reg' here? > > > > > > > It has multiple registers in the syscon. But in fact, the dmamux > > is a virtual device. And the syscon device only have some discrete > > registers. This is why I did not put reg. It should access the > > device using the offset defined in the patch 3. > > I would add: > > reg = <0x154 8>, <0x298 0x4>; This is what I have done before. :) > > (with appropriate "ranges" in parent) > > No requirement for Linux to use this either. It seems like that the device should only be described, right? Also a small question, is it better to add reg-names for this? > > Rob ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 3/4] soc/sophgo: add top sysctrl layout file for CV18XX/SG200X 2024-02-20 10:25 [PATCH 0/4] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto 2024-02-20 10:28 ` [PATCH v2 1/4] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Inochi Amaoto 2024-02-20 10:28 ` [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of " Inochi Amaoto @ 2024-02-20 10:29 ` Inochi Amaoto 2024-02-20 10:29 ` [PATCH v2 4/4] dmaengine: add driver for Sophgo CV18XX/SG200X dmamux Inochi Amaoto 2024-02-20 10:34 ` [PATCH 0/4 v2] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto 4 siblings, 0 replies; 11+ messages in thread From: Inochi Amaoto @ 2024-02-20 10:29 UTC (permalink / raw) To: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Inochi Amaoto Cc: Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel The "top" system controller of CV18XX/SG200X exposes control register access for various devices. Add soc header file to describe it. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> --- include/soc/sophgo/cv1800-sysctl.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 include/soc/sophgo/cv1800-sysctl.h diff --git a/include/soc/sophgo/cv1800-sysctl.h b/include/soc/sophgo/cv1800-sysctl.h new file mode 100644 index 000000000000..b9396d33e240 --- /dev/null +++ b/include/soc/sophgo/cv1800-sysctl.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com> + */ + +#ifndef CV1800_SYSCTL_H +#define CV1800_SYSCTL_H + +/* + * SOPHGO CV1800/SG2000 SoC top system controller registers offsets. + */ + +#define CV1800_CONF_INFO 0x004 +#define CV1800_SYS_CTRL_REG 0x008 +#define CV1800_USB_PHY_CTRL_REG 0x048 +#define CV1800_SDMA_DMA_CHANNEL_REMAP0 0x154 +#define CV1800_SDMA_DMA_CHANNEL_REMAP1 0x158 +#define CV1800_TOP_TIMER_CLK_SEL 0x1a0 +#define CV1800_TOP_WDT_CTRL 0x1a8 +#define CV1800_DDR_AXI_URGENT_OW 0x1b8 +#define CV1800_DDR_AXI_URGENT 0x1bc +#define CV1800_DDR_AXI_QOS_0 0x1d8 +#define CV1800_DDR_AXI_QOS_1 0x1dc +#define CV1800_SD_PWRSW_CTRL 0x1f4 +#define CV1800_SD_PWRSW_TIME 0x1f8 +#define CV1800_DDR_AXI_QOS_OW 0x23c +#define CV1800_SD_CTRL_OPT 0x294 +#define CV1800_SDMA_DMA_INT_MUX 0x298 + +#endif // CV1800_SYSCTL_H -- 2.43.2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 4/4] dmaengine: add driver for Sophgo CV18XX/SG200X dmamux 2024-02-20 10:25 [PATCH 0/4] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto ` (2 preceding siblings ...) 2024-02-20 10:29 ` [PATCH v2 3/4] soc/sophgo: add top sysctrl layout file for CV18XX/SG200X Inochi Amaoto @ 2024-02-20 10:29 ` Inochi Amaoto 2024-02-20 10:34 ` [PATCH 0/4 v2] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto 4 siblings, 0 replies; 11+ messages in thread From: Inochi Amaoto @ 2024-02-20 10:29 UTC (permalink / raw) To: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Inochi Amaoto Cc: Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel Sophgo CV18XX/SG200X use DW AXI CORE with a multiplexer for remapping its request lines. The multiplexer supports at most 8 request lines. Add driver for Sophgo CV18XX/SG200X DMA multiplexer. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> --- drivers/dma/Kconfig | 9 ++ drivers/dma/Makefile | 1 + drivers/dma/cv1800-dmamux.c | 232 ++++++++++++++++++++++++++++++++++++ 3 files changed, 242 insertions(+) create mode 100644 drivers/dma/cv1800-dmamux.c diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index e928f2ca0f1e..5220b4eba3a4 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -546,6 +546,15 @@ config PLX_DMA These are exposed via extra functions on the switch's upstream port. Each function exposes one DMA channel. +config SOPHGO_CV1800_DMAMUX + tristate "Sophgo CV1800/SG2000 series SoC DMA multiplexer support" + depends on MFD_SYSCON + depends on ARCH_SOPHGO + help + Support for the DMA multiplexer on Sophgo CV1800/SG2000 + series SoCs. + Say Y here if your board have this soc. + config STE_DMA40 bool "ST-Ericsson DMA40 support" depends on ARCH_U8500 diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index dfd40d14e408..7465f249ee47 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -67,6 +67,7 @@ obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/ obj-$(CONFIG_PXA_DMA) += pxa_dma.o obj-$(CONFIG_RENESAS_DMA) += sh/ obj-$(CONFIG_SF_PDMA) += sf-pdma/ +obj-$(CONFIG_SOPHGO_CV1800_DMAMUX) += cv1800-dmamux.o obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o obj-$(CONFIG_STM32_DMA) += stm32-dma.o obj-$(CONFIG_STM32_DMAMUX) += stm32-dmamux.o diff --git a/drivers/dma/cv1800-dmamux.c b/drivers/dma/cv1800-dmamux.c new file mode 100644 index 000000000000..b41c39f2e338 --- /dev/null +++ b/drivers/dma/cv1800-dmamux.c @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com> + */ + +#include <linux/bitops.h> +#include <linux/module.h> +#include <linux/of_dma.h> +#include <linux/of_address.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/spinlock.h> +#include <linux/mfd/syscon.h> + +#include <soc/sophgo/cv1800-sysctl.h> +#include <dt-bindings/dma/cv1800-dma.h> + +#define DMAMUX_NCELLS 3 +#define MAX_DMA_MAPPING_ID DMA_SPI_NOR1 +#define MAX_DMA_CPU_ID DMA_CPU_C906_1 +#define MAX_DMA_CH_ID 7 + +#define DMAMUX_INTMUX_REGISTER_LEN 4 +#define DMAMUX_NR_CH_PER_REGISTER 4 +#define DMAMUX_BIT_PER_CH 8 +#define DMAMUX_CH_MASk GENMASK(5, 0) +#define DMAMUX_INT_BIT_PER_CPU 10 +#define DMAMUX_CH_UPDATE_BIT BIT(31) + +#define DMAMUX_CH_SET(chid, val) \ + (((val) << ((chid) * DMAMUX_BIT_PER_CH)) | DMAMUX_CH_UPDATE_BIT) +#define DMAMUX_CH_MASK(chid) \ + DMAMUX_CH_SET(chid, DMAMUX_CH_MASk) + +#define DMAMUX_INT_BIT(chid, cpuid) \ + BIT((cpuid) * DMAMUX_INT_BIT_PER_CPU + (chid)) +#define DMAMUX_INTEN_BIT(cpuid) \ + DMAMUX_INT_BIT(8, cpuid) +#define DMAMUX_INT_CH_BIT(chid, cpuid) \ + (DMAMUX_INT_BIT(chid, cpuid) | DMAMUX_INTEN_BIT(cpuid)) +#define DMAMUX_INT_MASK(chid) \ + (DMAMUX_INT_BIT(chid, DMA_CPU_A53) | \ + DMAMUX_INT_BIT(chid, DMA_CPU_C906_0) | \ + DMAMUX_INT_BIT(chid, DMA_CPU_C906_1)) +#define DMAMUX_INT_CH_MASK(chid, cpuid) \ + (DMAMUX_INT_MASK(chid) | DMAMUX_INTEN_BIT(cpuid)) + +struct cv1800_dmamux_data { + struct dma_router dmarouter; + struct regmap *regmap; + spinlock_t lock; + DECLARE_BITMAP(used_chans, MAX_DMA_CH_ID); + DECLARE_BITMAP(mapped_peripherals, MAX_DMA_MAPPING_ID); +}; + +struct cv1800_dmamux_map { + unsigned int channel; + unsigned int peripheral; + unsigned int cpu; +}; + +static void cv1800_dmamux_free(struct device *dev, void *route_data) +{ + struct cv1800_dmamux_data *dmamux = dev_get_drvdata(dev); + struct cv1800_dmamux_map *map = route_data; + u32 regoff = map->channel % DMAMUX_NR_CH_PER_REGISTER; + u32 regpos = map->channel / DMAMUX_NR_CH_PER_REGISTER; + unsigned long flags; + + spin_lock_irqsave(&dmamux->lock, flags); + + regmap_update_bits(dmamux->regmap, + regpos + CV1800_SDMA_DMA_CHANNEL_REMAP0, + DMAMUX_CH_MASK(regoff), + DMAMUX_CH_UPDATE_BIT); + + regmap_update_bits(dmamux->regmap, CV1800_SDMA_DMA_INT_MUX, + DMAMUX_INT_CH_MASK(map->channel, map->cpu), + DMAMUX_INTEN_BIT(map->cpu)); + + clear_bit(map->channel, dmamux->used_chans); + clear_bit(map->peripheral, dmamux->mapped_peripherals); + + spin_unlock_irqrestore(&dmamux->lock, flags); + + kfree(map); +} + +static void *cv1800_dmamux_route_allocate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); + struct cv1800_dmamux_data *dmamux = platform_get_drvdata(pdev); + struct cv1800_dmamux_map *map; + unsigned long flags; + unsigned int chid, devid, cpuid; + u32 regoff, regpos; + + if (dma_spec->args_count != DMAMUX_NCELLS) { + dev_err(&pdev->dev, "invalid number of dma mux args\n"); + return ERR_PTR(-EINVAL); + } + + chid = dma_spec->args[0]; + devid = dma_spec->args[1]; + cpuid = dma_spec->args[2]; + dma_spec->args_count -= 2; + + if (chid > MAX_DMA_CH_ID) { + dev_err(&pdev->dev, "invalid channel id: %u\n", chid); + return ERR_PTR(-EINVAL); + } + + if (devid > MAX_DMA_MAPPING_ID) { + dev_err(&pdev->dev, "invalid device id: %u\n", devid); + return ERR_PTR(-EINVAL); + } + + if (cpuid > MAX_DMA_CPU_ID) { + dev_err(&pdev->dev, "invalid cpu id: %u\n", cpuid); + return ERR_PTR(-EINVAL); + } + + dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0); + if (!dma_spec->np) { + dev_err(&pdev->dev, "can't get dma master\n"); + return ERR_PTR(-EINVAL); + } + + map = kzalloc(sizeof(*map), GFP_KERNEL); + if (!map) + return ERR_PTR(-ENOMEM); + + map->channel = chid; + map->peripheral = devid; + map->cpu = cpuid; + + regoff = chid % DMAMUX_NR_CH_PER_REGISTER; + regpos = chid / DMAMUX_NR_CH_PER_REGISTER; + + spin_lock_irqsave(&dmamux->lock, flags); + + if (test_and_set_bit(devid, dmamux->mapped_peripherals)) { + dev_err(&pdev->dev, "already used device mapping: %u\n", devid); + goto failed; + } + + if (test_and_set_bit(chid, dmamux->used_chans)) { + clear_bit(devid, dmamux->mapped_peripherals); + dev_err(&pdev->dev, "already used channel id: %u\n", chid); + goto failed; + } + + regmap_set_bits(dmamux->regmap, + regpos + CV1800_SDMA_DMA_CHANNEL_REMAP0, + DMAMUX_CH_SET(regoff, devid)); + + regmap_update_bits(dmamux->regmap, CV1800_SDMA_DMA_INT_MUX, + DMAMUX_INT_CH_MASK(chid, cpuid), + DMAMUX_INT_CH_BIT(chid, cpuid)); + + spin_unlock_irqrestore(&dmamux->lock, flags); + + dev_info(&pdev->dev, "register channel %u for req %u (cpu %u)\n", + chid, devid, cpuid); + + return map; + +failed: + spin_unlock_irqrestore(&dmamux->lock, flags); + dev_err(&pdev->dev, "already used channel id: %u\n", chid); + return ERR_PTR(-EBUSY); +} + +static int cv1800_dmamux_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *mux_node = dev->of_node; + struct cv1800_dmamux_data *data; + struct device *parent = dev->parent; + struct device_node *dma_master; + struct regmap *map = NULL; + + if (!parent) + return -ENODEV; + + map = device_node_to_regmap(parent->of_node); + if (IS_ERR(map)) + return PTR_ERR(map); + + dma_master = of_parse_phandle(mux_node, "dma-masters", 0); + if (!dma_master) { + dev_err(dev, "invalid dma-requests property\n"); + return -ENODEV; + } + of_node_put(dma_master); + + data = devm_kmalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + spin_lock_init(&data->lock); + data->regmap = map; + data->dmarouter.dev = dev; + data->dmarouter.route_free = cv1800_dmamux_free; + + platform_set_drvdata(pdev, data); + + return of_dma_router_register(mux_node, + cv1800_dmamux_route_allocate, + &data->dmarouter); +} + +static const struct of_device_id cv1800_dmamux_ids[] = { + { .compatible = "sophgo,cv1800-dmamux", }, + { } +}; +MODULE_DEVICE_TABLE(of, cv1800_dmamux_ids); + +static struct platform_driver cv1800_dmamux_driver = { + .driver = { + .name = "fsl-raideng", + .of_match_table = cv1800_dmamux_ids, + }, + .probe = cv1800_dmamux_probe, +}; +module_platform_driver(cv1800_dmamux_driver); + +MODULE_AUTHOR("Inochi Amaoto <inochiama@outlook.com>"); +MODULE_DESCRIPTION("Sophgo CV1800/SG2000 Series Soc DMAMUX driver"); +MODULE_LICENSE("GPL"); -- 2.43.2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 0/4 v2] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs 2024-02-20 10:25 [PATCH 0/4] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto ` (3 preceding siblings ...) 2024-02-20 10:29 ` [PATCH v2 4/4] dmaengine: add driver for Sophgo CV18XX/SG200X dmamux Inochi Amaoto @ 2024-02-20 10:34 ` Inochi Amaoto 4 siblings, 0 replies; 11+ messages in thread From: Inochi Amaoto @ 2024-02-20 10:34 UTC (permalink / raw) To: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Inochi Amaoto Cc: Chen Wang, Jisheng Zhang, Liu Gui, Jingbao Qiu, dlan, dmaengine, devicetree, linux-kernel This should be the v2 version, the cover have a wrong number. Please ignore the wrong changelog. It is "changed from v1". ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2024-02-29 3:24 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-02-20 10:25 [PATCH 0/4] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto 2024-02-20 10:28 ` [PATCH v2 1/4] dt-bindings: dmaengine: Add dmamux for CV18XX/SG200X series SoC Inochi Amaoto 2024-02-23 0:32 ` Rob Herring 2024-02-20 10:28 ` [PATCH v2 2/4] dt-bindings: soc: sophgo: Add top misc controller of " Inochi Amaoto 2024-02-23 0:33 ` Rob Herring 2024-02-23 1:47 ` Inochi Amaoto 2024-02-28 17:07 ` Rob Herring 2024-02-29 3:25 ` Inochi Amaoto 2024-02-20 10:29 ` [PATCH v2 3/4] soc/sophgo: add top sysctrl layout file for CV18XX/SG200X Inochi Amaoto 2024-02-20 10:29 ` [PATCH v2 4/4] dmaengine: add driver for Sophgo CV18XX/SG200X dmamux Inochi Amaoto 2024-02-20 10:34 ` [PATCH 0/4 v2] riscv: sophgo: add dmamux support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto
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