[PATCH v1] arm64: dts: ti: verdin-am62: dahlia: fix audio clock

[PATCH v1] arm64: dts: ti: verdin-am62: dahlia: fix audio clock

[Andrejs Cainikovs]

From: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>

In current configuration, wm8904 codec on Dahlia carrier board provides
distorted audio output. This happens due to reference clock is fixed to
25MHz and no FLL is enabled. During playback following parameters are set:

44100Hz:

[  310.276924] wm8904 1-001a: Target BCLK is 1411200Hz
[  310.276990] wm8904 1-001a: Using 25000000Hz MCLK
[  310.277001] wm8904 1-001a: CLK_SYS is 12500000Hz
[  310.277018] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
[  310.277026] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz
[  310.277034] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK
[  310.277044] wm8904 1-001a: LRCLK_RATE is 35

Deviation = 1411200 vs 1562500 = 10.721%
Also, LRCLK_RATE is 35, should be 32.

48000Hz:

[  302.449970] wm8904 1-001a: Target BCLK is 1536000Hz
[  302.450037] wm8904 1-001a: Using 25000000Hz MCLK
[  302.450049] wm8904 1-001a: CLK_SYS is 12500000Hz
[  302.450065] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
[  302.450074] wm8904 1-001a: Selected SAMPLE_RATE of 48000Hz
[  302.450083] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK
[  302.450092] wm8904 1-001a: LRCLK_RATE is 32

Deviation = 1536000 vs 1562500 = 1.725%

Enabling wm8904 FLL via providing mclk-fs property to simple-audio-card
configures clocks properly, but also adjusts audio reference clock
(mclk), which in case of TI AM62 should be avoided, as it only
supports 25MHz output [1][2].

This change enables FLL on wm8904 by providing mclk-fs, and drops
audio reference clock out of DAI configuration, which prevents
simple-audio-card to adjust it before every playback [3].

41000Hz:

[  111.820533] wm8904 1-001a: FLL configured for 25000000Hz->11289600Hz
[  111.820597] wm8904 1-001a: Clock source is 0 at 11289600Hz
[  111.820651] wm8904 1-001a: Using 11289600Hz FLL clock
[  111.820703] wm8904 1-001a: CLK_SYS is 11289600Hz
[  111.820798] wm8904 1-001a: Target BCLK is 1411200Hz
[  111.820847] wm8904 1-001a: Using 11289600Hz FLL clock
[  111.820894] wm8904 1-001a: CLK_SYS is 11289600Hz
[  111.820933] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
[  111.820971] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz
[  111.821009] wm8904 1-001a: Selected BCLK_DIV of 80 for 1411200Hz BCLK
[  111.821051] wm8904 1-001a: LRCLK_RATE is 32

48000Hz:

[  144.119254] wm8904 1-001a: FLL configured for 25000000Hz->12288000Hz
[  144.119309] wm8904 1-001a: Clock source is 0 at 12288000Hz
[  144.119364] wm8904 1-001a: Using 12288000Hz FLL clock
[  144.119413] wm8904 1-001a: CLK_SYS is 12288000Hz
[  144.119512] wm8904 1-001a: Target BCLK is 1536000Hz
[  144.119561] wm8904 1-001a: Using 12288000Hz FLL clock
[  144.119608] wm8904 1-001a: CLK_SYS is 12288000Hz
[  144.119646] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
[  144.119685] wm8904 1-001a: Selected SAMPLE_RATE of 48000Hz
[  144.119723] wm8904 1-001a: Selected BCLK_DIV of 80 for 1536000Hz BCLK
[  144.119764] wm8904 1-001a: LRCLK_RATE is 32

[1]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1175479/processor-sdk-am62x-output-audio_ext_refclk0-as-mclk-for-codec-and-mcbsp/4444986#4444986
[2]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322
[3]: sound/soc/generic/simple-card-utils.c#L441

Fixes: f5bf894c865b ("arm64: dts: ti: verdin-am62: dahlia: add sound card")
Suggested-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
---
 arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi
index bf6d27e70bc48..2b12a626d0e4d 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi
@@ -22,6 +22,7 @@ sound {
 		simple-audio-card,format = "i2s";
 		simple-audio-card,frame-master = <&codec_dai>;
 		simple-audio-card,name = "verdin-wm8904";
+		simple-audio-card,mclk-fs = <256>;
 		simple-audio-card,routing =
 			"Headphone Jack", "HPOUTL",
 			"Headphone Jack", "HPOUTR",
@@ -35,7 +36,6 @@ sound {
 			"Line", "Line In Jack";
 
 		codec_dai: simple-audio-card,codec {
-			clocks = <&audio_refclk1>;
 			sound-dai = <&wm8904_1a>;
 		};
 
-- 
2.34.1

Re: [PATCH v1] arm64: dts: ti: verdin-am62: dahlia: fix audio clock

[Charles Keepax]

On Fri, Mar 15, 2024 at 11:25:00AM +0100, Andrejs Cainikovs wrote:
> From: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> 
> In current configuration, wm8904 codec on Dahlia carrier board provides
> distorted audio output. This happens due to reference clock is fixed to
> 25MHz and no FLL is enabled. During playback following parameters are set:
> 
> 44100Hz:
> 
> [  310.276924] wm8904 1-001a: Target BCLK is 1411200Hz
> [  310.276990] wm8904 1-001a: Using 25000000Hz MCLK
> [  310.277001] wm8904 1-001a: CLK_SYS is 12500000Hz
> [  310.277018] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
> [  310.277026] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz
> [  310.277034] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK
> [  310.277044] wm8904 1-001a: LRCLK_RATE is 35
> 
> Deviation = 1411200 vs 1562500 = 10.721%
> Also, LRCLK_RATE is 35, should be 32.
> 
> 48000Hz:
> 
> [  302.449970] wm8904 1-001a: Target BCLK is 1536000Hz
> [  302.450037] wm8904 1-001a: Using 25000000Hz MCLK
> [  302.450049] wm8904 1-001a: CLK_SYS is 12500000Hz
> [  302.450065] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
> [  302.450074] wm8904 1-001a: Selected SAMPLE_RATE of 48000Hz
> [  302.450083] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK
> [  302.450092] wm8904 1-001a: LRCLK_RATE is 32
> 
> Deviation = 1536000 vs 1562500 = 1.725%
> 
> Enabling wm8904 FLL via providing mclk-fs property to simple-audio-card
> configures clocks properly, but also adjusts audio reference clock
> (mclk), which in case of TI AM62 should be avoided, as it only
> supports 25MHz output [1][2].
> 
> This change enables FLL on wm8904 by providing mclk-fs, and drops
> audio reference clock out of DAI configuration, which prevents
> simple-audio-card to adjust it before every playback [3].
> 
> 41000Hz:
> 
> [  111.820533] wm8904 1-001a: FLL configured for 25000000Hz->11289600Hz
> [  111.820597] wm8904 1-001a: Clock source is 0 at 11289600Hz
> [  111.820651] wm8904 1-001a: Using 11289600Hz FLL clock
> [  111.820703] wm8904 1-001a: CLK_SYS is 11289600Hz
> [  111.820798] wm8904 1-001a: Target BCLK is 1411200Hz
> [  111.820847] wm8904 1-001a: Using 11289600Hz FLL clock
> [  111.820894] wm8904 1-001a: CLK_SYS is 11289600Hz
> [  111.820933] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
> [  111.820971] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz
> [  111.821009] wm8904 1-001a: Selected BCLK_DIV of 80 for 1411200Hz BCLK
> [  111.821051] wm8904 1-001a: LRCLK_RATE is 32
> 
> 48000Hz:
> 
> [  144.119254] wm8904 1-001a: FLL configured for 25000000Hz->12288000Hz
> [  144.119309] wm8904 1-001a: Clock source is 0 at 12288000Hz
> [  144.119364] wm8904 1-001a: Using 12288000Hz FLL clock
> [  144.119413] wm8904 1-001a: CLK_SYS is 12288000Hz
> [  144.119512] wm8904 1-001a: Target BCLK is 1536000Hz
> [  144.119561] wm8904 1-001a: Using 12288000Hz FLL clock
> [  144.119608] wm8904 1-001a: CLK_SYS is 12288000Hz
> [  144.119646] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
> [  144.119685] wm8904 1-001a: Selected SAMPLE_RATE of 48000Hz
> [  144.119723] wm8904 1-001a: Selected BCLK_DIV of 80 for 1536000Hz BCLK
> [  144.119764] wm8904 1-001a: LRCLK_RATE is 32
> 
> [1]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1175479/processor-sdk-am62x-output-audio_ext_refclk0-as-mclk-for-codec-and-mcbsp/4444986#4444986
> [2]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322
> [3]: sound/soc/generic/simple-card-utils.c#L441
> 
> Fixes: f5bf894c865b ("arm64: dts: ti: verdin-am62: dahlia: add sound card")
> Suggested-by: Charles Keepax <ckeepax@opensource.cirrus.com>
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> ---

Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>

Thanks,
Charles

Re: [PATCH v1] arm64: dts: ti: verdin-am62: dahlia: fix audio clock

[Francesco Dolcini]

On Fri, Mar 15, 2024 at 11:25:00AM +0100, Andrejs Cainikovs wrote:
> From: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> 
> In current configuration, wm8904 codec on Dahlia carrier board provides
> distorted audio output. This happens due to reference clock is fixed to
> 25MHz and no FLL is enabled. During playback following parameters are set:

[...]

> Fixes: f5bf894c865b ("arm64: dts: ti: verdin-am62: dahlia: add sound card")
> Suggested-by: Charles Keepax <ckeepax@opensource.cirrus.com>
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>

Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>

Francesco

Re: [PATCH v1] arm64: dts: ti: verdin-am62: dahlia: fix audio clock

[Nishanth Menon]

Hi Andrejs Cainikovs,

On Fri, 15 Mar 2024 11:25:00 +0100, Andrejs Cainikovs wrote:
> In current configuration, wm8904 codec on Dahlia carrier board provides
> distorted audio output. This happens due to reference clock is fixed to
> 25MHz and no FLL is enabled. During playback following parameters are set:
> 
> 44100Hz:
> 
> [  310.276924] wm8904 1-001a: Target BCLK is 1411200Hz
> [  310.276990] wm8904 1-001a: Using 25000000Hz MCLK
> [  310.277001] wm8904 1-001a: CLK_SYS is 12500000Hz
> [  310.277018] wm8904 1-001a: Selected CLK_SYS_RATIO of 256
> [  310.277026] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz
> [  310.277034] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK
> [  310.277044] wm8904 1-001a: LRCLK_RATE is 35
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/1] arm64: dts: ti: verdin-am62: dahlia: fix audio clock
      commit: a15e5320d91abe68ff1123bb72583d629c49100c

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
-- 
Regards,
Nishanth Menon
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