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From: Neil Armstrong <neil.armstrong@linaro.org>
To: Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Kevin Hilman <khilman@baylibre.com>,
	 Jerome Brunet <jbrunet@baylibre.com>,
	 Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>,
	 Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	 Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	 Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	 David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>,
	 Nicolas Belin <nbelin@baylibre.com>,
	 Jagan Teki <jagan@amarulasolutions.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	 linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	dri-devel@lists.freedesktop.org,
	 Neil Armstrong <neil.armstrong@linaro.org>
Subject: [PATCH v11 4/7] drm/meson: gate px_clk when setting rate
Date: Mon, 25 Mar 2024 12:09:50 +0100	[thread overview]
Message-ID: <20240325-amlogic-v6-4-upstream-dsi-ccf-vim3-v11-4-04f55de44604@linaro.org> (raw)
In-Reply-To: <20240325-amlogic-v6-4-upstream-dsi-ccf-vim3-v11-0-04f55de44604@linaro.org>

Disable the px_clk when setting the rate to recover a fully
configured and correctly reset VCLK clock tree after the rate
is set.

Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
index a6bc1bdb3d0d..a10cff3ca1fe 100644
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
@@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
 		return ret;
 	}
 
+	clk_disable_unprepare(mipi_dsi->px_clk);
 	ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);
 
 	if (ret) {
@@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
 		return ret;
 	}
 
+	ret = clk_prepare_enable(mipi_dsi->px_clk);
+	if (ret) {
+		dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret);
+		return ret;
+	}
+
 	switch (mipi_dsi->dsi_device->format) {
 	case MIPI_DSI_FMT_RGB888:
 		dpi_data_format = DPI_COLOR_24BIT;

-- 
2.34.1


  parent reply	other threads:[~2024-03-25 11:10 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-25 11:09 [PATCH v11 0/7] drm/meson: add support for MIPI DSI Display Neil Armstrong
2024-03-25 11:09 ` [PATCH v11 1/7] dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module Neil Armstrong
2024-03-25 11:09 ` [PATCH v11 2/7] clk: meson: add vclk driver Neil Armstrong
2024-03-29 12:33   ` Jerome Brunet
2024-03-29 16:07     ` Neil Armstrong
2024-03-25 11:09 ` [PATCH v11 3/7] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF Neil Armstrong
2024-03-29 12:35   ` Jerome Brunet
2024-03-29 16:06     ` Neil Armstrong
2024-03-25 11:09 ` Neil Armstrong [this message]
2024-03-25 11:09 ` [PATCH v11 5/7] arm64: meson: g12-common: add the MIPI DSI nodes Neil Armstrong
2024-03-25 11:09 ` [PATCH v11 6/7] arm64: meson: khadas-vim3l: add TS050 DSI panel overlay Neil Armstrong
2024-03-25 11:09 ` [PATCH v11 7/7] arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper Neil Armstrong
2024-03-25 13:55 ` [PATCH v11 0/7] drm/meson: add support for MIPI DSI Display Rob Herring
2024-04-10  8:54 ` Neil Armstrong

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