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From: Andre Przywara <andre.przywara@arm.com>
To: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Rob Herring <robh@kernel.org>, Yangtao Li <tiny.windzz@gmail.com>,
	Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-sunxi@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	Brandon Cheo Fusi <fusibrandon13@gmail.com>,
	Martin Botka <martin.botka@somainline.org>,
	Martin Botka <martin.botka1@gmail.com>
Subject: Re: [PATCH v2 3/8] dt-bindings: opp: Describe H616 OPPs and opp-supported-hw
Date: Tue, 26 Mar 2024 11:02:36 +0000	[thread overview]
Message-ID: <20240326110236.69ba33a8@donnerap.manchester.arm.com> (raw)
In-Reply-To: <20240321030923.4sf3lifbmnvvidaa@vireshk-i7>

On Thu, 21 Mar 2024 08:39:23 +0530
Viresh Kumar <viresh.kumar@linaro.org> wrote:

Hi Viresh,

thanks for chiming in!

> On 20-03-24, 15:37, Andre Przywara wrote:
> > On Wed, 20 Mar 2024 10:02:28 -0500
> > Rob Herring <robh@kernel.org> wrote:  
> > > On Mon, Mar 18, 2024 at 01:12:23AM +0000, Andre Przywara wrote:  
> > > > From: Martin Botka <martin.botka@somainline.org>
> > > > -        opp-1080000000 {
> > > > +        opp-792000000-l {
> > > >              clock-latency-ns = <244144>; /* 8 32k periods */
> > > > -            opp-hz = /bits/ 64 <1080000000>;
> > > > +            opp-hz = /bits/ 64 <792000000>;
> > > >  
> > > > -            opp-microvolt-speed0 = <1060000>;
> > > > -            opp-microvolt-speed1 = <880000>;
> > > > -            opp-microvolt-speed2 = <840000>;
> > > > +            opp-microvolt = <900000>;
> > > > +            opp-supported-hw = <0x02>;
> > > >          };
> > > >  
> > > > -        opp-1320000000 {
> > > > +        opp-792000000-h {
> > > >              clock-latency-ns = <244144>; /* 8 32k periods */
> > > > -            opp-hz = /bits/ 64 <1320000000>;
> > > > +            opp-hz = /bits/ 64 <792000000>;
> > > >  
> > > > -            opp-microvolt-speed0 = <1160000>;
> > > > -            opp-microvolt-speed1 = <940000>;
> > > > -            opp-microvolt-speed2 = <900000>;
> > > > +            opp-microvolt = <940000>;
> > > > +            opp-supported-hw = <0x10>;    
> > > 
> > > So far, we've avoided multiple entries for a single frequency. I think 
> > > it would be good to maintain that.  
> > 
> > Fair, I wasn't super happy with that either, but it still seemed better
> > than the alternatives.
> >   
> > > Couldn't you just do:
> > > 
> > > opp-supported-hw = <0>, <0x10>, <0x02>;
> > > 
> > > Where the index corresponds to speed0, speed1, speed2.
> > > 
> > > If not, then I don't understand how multiple entries of opp-supported-hw 
> > > are supposed to work.  
> > 
> > If I got this correctly, multiple cells in opp-supported-hw are to
> > describe various levels of hierarchy for a chip version, so like silicon
> > mask, metal layer revision, bin, I guess? The binding doc speaks of "cuts,
> > substrate and process", not really sure what that means exactly.  
> 
> Right. That basically translates to hardware versions the OPP will be parsed
> for.
> 
> > I think currently we cannot easily combine microvolt suffixes and
> > opp-supported-hw in one OPP node?  
> 
> It should be fine.

You are of course right, that works. I think I tried without
opp-supported-hw before, and then the code doesn't like missing voltage
lines.

> 
> > I think it bails out if one
> > microvolt-speed<x> property is missing, but I have to double check.
> > But IIRC v1 of this series somehow pulled that off, so we can maybe bring
> > it back? To end up with:
> > 	opp-792 {
> > 		opp-hz = <792000000>;
> > 		opp-microvolt-speed1 = <900000>;
> > 		opp-microvolt-speed4 = <940000>;
> > 		opp-supported-hw = <0x12>;
> > 	};  
> 
> That's what I thought too while reading your email.. Just populate the OPP for
> both 0x10 and 0x02 versions and let the speedN thing get you the right voltage.

Yes, that works nicely. I adjusted the binding example and the actual OPP
table accordingly. Will send a v3 shortly.

Cheers,
Andre

  reply	other threads:[~2024-03-26 11:02 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-18  1:12 [PATCH v2 0/8] cpufreq: sun50i: Add Allwinner H616 support Andre Przywara
2024-03-18  1:12 ` [PATCH v2 1/8] firmware: smccc: Export revision soc_id function Andre Przywara
2024-03-18  1:12 ` [PATCH v2 2/8] cpufreq: dt-platdev: Blocklist Allwinner H616/618 SoCs Andre Przywara
2024-03-18  1:12 ` [PATCH v2 3/8] dt-bindings: opp: Describe H616 OPPs and opp-supported-hw Andre Przywara
2024-03-20 15:02   ` Rob Herring
2024-03-20 15:37     ` Andre Przywara
2024-03-21  3:09       ` Viresh Kumar
2024-03-26 11:02         ` Andre Przywara [this message]
2024-03-18  1:12 ` [PATCH v2 4/8] cpufreq: sun50i: Refactor speed bin decoding Andre Przywara
2024-03-18  1:12 ` [PATCH v2 5/8] cpufreq: sun50i: Add support for opp_supported_hw Andre Przywara
2024-03-18  1:12 ` [PATCH v2 6/8] cpufreq: sun50i: Add H616 support Andre Przywara
2024-03-18  1:12 ` [PATCH v2 7/8] arm64: dts: allwinner: h616: Add CPU OPPs table Andre Przywara
2024-03-18  1:12 ` [PATCH v2 8/8] arm64: dts: allwinner: h616: enable DVFS for all boards Andre Przywara

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