From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 07F3854773; Mon, 29 Apr 2024 12:09:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714392594; cv=none; b=pTliCsJKL4qHrxIZt0hKXJHW4Sgvd+JYyWrcPugPGbEFE4TMTD/yPw2jPKO4veHWp3T/q5O/O4V7NjKjaYpjqE5Z6MNPK05kYcvGEEKIv46hyTb98qH5ViGngYrOAQHEs/qIj+2aOo9E0OySEvfnEwVnj7B/tscfmn4g2/zagxA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714392594; c=relaxed/simple; bh=10mLRSVfsONZcpEHzVY4tccU6YQar3l+2k/qFUJDPZI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=hzkLdP79RhgZSaSBOlsLYgFw0uQq63oJsffFTWYXDzJ37ptijT55JmKX6Ud1GxTOhhxK7WDn/5OGCG0n92aDSNdrr53onajU3PYphH2DMaE75gCBkcs7ZALtj7BXvnAHWvVjcY1B30+nAlnTmZSLKqkljGZQvTgybgrZz5wA2cg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=czXJS7ol; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="czXJS7ol" Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43TC9i6U090075; Mon, 29 Apr 2024 07:09:44 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1714392584; bh=nHkEaR6Gl78Rj5Ss1HEU230OJcZBGWCBmIUjCtcYEHE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=czXJS7olciWQXevm1POU3buuYi2Uz2/vgVvh59dFSUPuAvEDLwWkV2x/wfp8ADAje m+tprFke+GlBoPKJ5rNm3AIEQKHEQ7dH6+PxA0l6W1FOMXVCFoUPdSFA+jCh+Ggp8z UhXAWahJKsK9T0xOzT2UwUqLosnzk6VeXTHr/7GU= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43TC9iOh099131 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 29 Apr 2024 07:09:44 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 29 Apr 2024 07:09:44 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 29 Apr 2024 07:09:44 -0500 Received: from uda0500640.dal.design.ti.com (uda0500640.dhcp.ti.com [172.24.227.88]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43TC9XrG012367; Mon, 29 Apr 2024 07:09:41 -0500 From: Ravi Gunasekaran To: , CC: , , , , , , , , , Subject: [PATCH 2/3] arm64: dts: ti: k3-j722s: Redefine USB1 node description Date: Mon, 29 Apr 2024 17:39:31 +0530 Message-ID: <20240429120932.11456-3-r-gunasekaran@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240429120932.11456-1-r-gunasekaran@ti.com> References: <20240429120932.11456-1-r-gunasekaran@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 USB1 controller on J722S and AM62P are from different vendors. Redefine the USB1 node description for J722S by deleting the node inherited from AM62P dtsi. Signed-off-by: Ravi Gunasekaran --- arch/arm64/boot/dts/ti/k3-j722s.dtsi | 39 ++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi index beba5a3ea6cc..90725eeb3178 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -13,6 +13,13 @@ #include "k3-am62p5.dtsi" +/* + * USB1 controller on AM62P and J722S are of different IP. + * Delete AM62P's USBSS1 node definition and redefine it for J722S. + */ + +/delete-node/ &usbss1; + / { model = "Texas Instruments K3 J722S SoC"; compatible = "ti,j722s"; @@ -120,6 +127,38 @@ status = "disabled"; /* Needs lane config */ }; }; + + usbss1: cdns-usb@f920000 { + compatible = "ti,j721e-usb"; + reg = <0x00 0x0f920000 0x00 0x100>; + ranges; + power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 278 3>, <&k3_clks 278 1>; + clock-names = "ref", "lpm"; + assigned-clocks = <&k3_clks 278 3>; /* USB2_REFCLK */ + assigned-clock-parents = <&k3_clks 278 4>; /* HF0SC0 */ + #address-cells = <2>; + #size-cells = <2>; + status = "disabled"; + + usb1: usb@31200000{ + compatible = "cdns,usb3"; + reg = <0x00 0x31200000 0x00 0x10000>, + <0x00 0x31210000 0x00 0x10000>, + <0x00 0x31220000 0x00 0x10000>; + reg-names = "otg", + "xhci", + "dev"; + interrupts = , /* irq.0 */ + , /* irq.6 */ + ; /* otgirq */ + interrupt-names = "host", + "peripheral", + "otg"; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + }; }; /* Main domain overrides */ -- 2.17.1