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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2bc9bce16d6sm3062061a91.19.2024.05.17.10.20.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 May 2024 10:21:00 -0700 (PDT) Date: Sat, 18 May 2024 02:20:58 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Mrinmay Sarkar Cc: andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, manivannan.sadhasivam@linaro.org, robh@kernel.org, quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_schintav@quicinc.com, Lorenzo Pieralisi , Bjorn Helgaas , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH v7 0/3] arm64: qcom: sa8775p: add cache coherency support for SA8775P Message-ID: <20240517172058.GJ1947919@rocinante> References: <1710166298-27144-1-git-send-email-quic_msarkar@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1710166298-27144-1-git-send-email-quic_msarkar@quicinc.com> Hello, > Due to some hardware changes, SA8775P has set the NO_SNOOP attribute > in its TLP for all the PCIe controllers. NO_SNOOP attribute when set, > the requester is indicating that no cache coherency issues exist for > the addressed memory on the host i.e., memory is not cached. But in > reality, requester cannot assume this unless there is a complete > control/visibility over the addressed memory on the host. > > And worst case, if the memory is cached on the host, it may lead to > memory corruption issues. It should be noted that the caching of memory > on the host is not solely dependent on the NO_SNOOP attribute in TLP. > > So to avoid the corruption, this patch overrides the NO_SNOOP attribute > by setting the PCIE_PARF_NO_SNOOP_OVERIDE register. This patch is not > needed for other upstream supported platforms since they do not set > NO_SNOOP attribute by default. > > This series is to enable cache snooping logic in both RC and EP driver > and add the "dma-coherent" property in dtsi to support cache coherency > in SA8775P platform. > > Dependency > ---------- > > Depends on: > https://lore.kernel.org/all/1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com/ > https://lore.kernel.org/all/20240306-dw-hdma-v4-4-9fed506e95be@linaro.org/ [1] Applied to qcom, thank you! [01/02] PCI: qcom: Override NO_SNOOP attribute for SA8775P RC https://git.kernel.org/pci/pci/c/a51da87be9db [02/02] PCI: qcom-ep: Override NO_SNOOP attribute for SA8775P EP https://git.kernel.org/pci/pci/c/ce38ead6a0ed Krzysztof