* [PATCH v2 0/2] qcom: initial support for the SHIFTphone 8
@ 2024-05-20 15:29 Caleb Connolly
2024-05-20 15:29 ` [PATCH v2 1/2] dt-bindings: arm: qcom: Add QCM6490 " Caleb Connolly
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Caleb Connolly @ 2024-05-20 15:29 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Alexander Martinz, Luca Weiss, ~postmarketos/upstreaming,
linux-arm-msm, devicetree, linux-kernel, Krzysztof Kozlowski,
Caleb Connolly
The SHIFTphone 8 is an upcoming QCM6490 smartphone, it has the following
features:
* 12GB of RAM, 512GB UFS storage
* 1080p display.
* Hardware kill switches for cameras and microphones
* UART access via type-c SBU pins (enabled by an internal switch)
Initial support includes:
* Framebuffer display
* UFS and sdcard storage
* Battery monitoring and USB role switching via pmic glink
* Bluetooth
* Thermals
Wifi works but requires some commits to be reverted to prevent a
firmware crash.
The serial port on the device can be accessed via the usb-cereal
adapter, it must first be enabled by flipping the switch under the
display. Additional info can be found on the postmarketOS wiki page.
https://wiki.postmarketos.org/wiki/SHIFT_SHIFTphone_8_(shift-otter)
---
Changes in v2:
- Fix authorship
- Address Luca's feedback
- Link to v1: https://lore.kernel.org/r/20240508-otter-bringup-v1-0-c807d3d931f6@linaro.org
---
Caleb Connolly (2):
dt-bindings: arm: qcom: Add QCM6490 SHIFTphone 8
arm64: dts: qcom: add QCM6490 SHIFTphone 8
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts | 923 +++++++++++++++++++++++
3 files changed, 925 insertions(+)
---
change-id: 20240507-otter-bringup-388cf3aa7ca5
base-commit: a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6
// Caleb (they/them)
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v2 1/2] dt-bindings: arm: qcom: Add QCM6490 SHIFTphone 8 2024-05-20 15:29 [PATCH v2 0/2] qcom: initial support for the SHIFTphone 8 Caleb Connolly @ 2024-05-20 15:29 ` Caleb Connolly 2024-05-20 15:29 ` [PATCH v2 2/2] arm64: dts: qcom: add " Caleb Connolly 2024-05-21 12:53 ` [PATCH v2 0/2] qcom: initial support for the " Rob Herring (Arm) 2 siblings, 0 replies; 5+ messages in thread From: Caleb Connolly @ 2024-05-20 15:29 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Alexander Martinz, Luca Weiss, ~postmarketos/upstreaming, linux-arm-msm, devicetree, linux-kernel, Krzysztof Kozlowski, Caleb Connolly The SHIFTphone 8 (codename otter) is a smartphone based on the QCM6490 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Caleb Connolly <caleb@postmarketos.org> --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 66beaac60e1d..d4b2d39f914e 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -364,8 +364,9 @@ properties: - enum: - fairphone,fp5 - qcom,qcm6490-idp - qcom,qcs6490-rb3gen2 + - shift,otter - const: qcom,qcm6490 - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform items: -- 2.45.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: add QCM6490 SHIFTphone 8 2024-05-20 15:29 [PATCH v2 0/2] qcom: initial support for the SHIFTphone 8 Caleb Connolly 2024-05-20 15:29 ` [PATCH v2 1/2] dt-bindings: arm: qcom: Add QCM6490 " Caleb Connolly @ 2024-05-20 15:29 ` Caleb Connolly 2024-05-21 8:10 ` Luca Weiss 2024-05-21 12:53 ` [PATCH v2 0/2] qcom: initial support for the " Rob Herring (Arm) 2 siblings, 1 reply; 5+ messages in thread From: Caleb Connolly @ 2024-05-20 15:29 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Alexander Martinz, Luca Weiss, ~postmarketos/upstreaming, linux-arm-msm, devicetree, linux-kernel, Caleb Connolly The SHIFTphone 8 is an upcoming QCM6490 smartphone, it has the following features: * 12GB of RAM, 512GB UFS storage * 1080p display. * Hardware kill switches for cameras and microphones * UART access via type-c SBU pins (enabled by an internal switch) Initial support includes: * Framebuffer display * UFS and sdcard storage * Battery monitoring and USB role switching via pmic glink * Bluetooth * Thermals * Wifi Signed-off-by: Caleb Connolly <caleb@postmarketos.org> --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts | 923 +++++++++++++++++++++++ 2 files changed, 924 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 7d40ec5e7d21..678e800ac797 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -92,8 +92,9 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb dtb-$(CONFIG_ARCH_QCOM) += qcm6490-fairphone-fp5.dtb dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts new file mode 100644 index 000000000000..72ce2b0ee2f4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts @@ -0,0 +1,923 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023, Luca Weiss <luca.weiss@fairphone.com> + * Copyright (c) 2024, Caleb Connolly <caleb@postmarketos.org> + */ + +/dts-v1/; + +#define PM7250B_SID 8 +#define PM7250B_SID1 9 + +#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> +#include "sc7280.dtsi" +#include "pm7250b.dtsi" +#include "pm7325.dtsi" +#include "pm8350c.dtsi" /* PM7350C */ +#include "pmk8350.dtsi" /* PMK7325 */ + +/delete-node/ &rmtfs_mem; + +/ { + model = "SHIFT SHIFTphone 8"; + compatible = "shift,otter", "qcom,qcm6490"; + chassis-type = "handset"; + + aliases { + serial0 = &uart5; + serial1 = &uart7; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0:115200n8"; + + framebuffer0: framebuffer@a000000 { + compatible = "simple-framebuffer"; + reg = <0x0 0xe1000000 0x0 (2400 * 1080 * 4)>; + width = <1080>; + height = <2400>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + clocks = <&gcc GCC_DISP_HF_AXI_CLK>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&volume_down_default>; + pinctrl-names = "default"; + + key-volume-up { + label = "Volume up"; + gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + debounce-interval = <15>; + }; + }; + + pmic-glink { + compatible = "qcom,qcm6490-pmic-glink", "qcom,pmic-glink"; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_hs_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_ss_in: endpoint { + remote-endpoint = <&usb_dp_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_sbu: endpoint { + remote-endpoint = <&fsa4480_sbu_mux>; + }; + }; + }; + }; + }; + + reserved-memory { + cont_splash_mem: cont-splash@e1000000 { + reg = <0x0 0xe1000000 0x0 0x2300000>; + no-map; + }; + + cdsp_mem: cdsp@88f00000 { + reg = <0x0 0x88f00000 0x0 0x1e00000>; + no-map; + }; + + rmtfs_mem: rmtfs@f8500000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0 0xf8500000 0x0 0x600000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>, <QCOM_SCM_VMID_NAV>; + }; + }; + + thermal-zones { + camera-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pmk8350_adc_tm 2>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + chg-skin-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pm7250b_adc_tm 0>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + conn-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pm7250b_adc_tm 1>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pmk8350_adc_tm 1>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + rear-cam-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pmk8350_adc_tm 4>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + sdm-skin-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pmk8350_adc_tm 3>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&pmk8350_adc_tm 0>; + + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm7325-rpmh-regulators"; + qcom,pmic-id = "b"; + + vreg_s1b: smps1 { + regulator-min-microvolt = <1840000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s7b: smps7 { + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + }; + + vreg_s8b: smps8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; + }; + + vreg_l1b: ldo1 { + regulator-min-microvolt = <825000>; + regulator-max-microvolt = <925000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2b: ldo2 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3b: ldo3 { + regulator-min-microvolt = <312000>; + regulator-max-microvolt = <910000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6b: ldo6 { + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7b: ldo7 { + /* Constrained for UFS VCC, at least until UFS driver scales voltage */ + regulator-min-microvolt = <2952000>; + regulator-max-microvolt = <2952000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8b: ldo8 { + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9b: ldo9 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11b: ldo11 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l12b: ldo12 { + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l13b: ldo13 { + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l14b: ldo14 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l15b: ldo15 { + regulator-min-microvolt = <765000>; + regulator-max-microvolt = <1020000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l16b: ldo16 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l17b: ldo17 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l18b: ldo18 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l19b: ldo19 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + }; + + regulators-1 { + compatible = "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s1c: smps1 { + regulator-min-microvolt = <2190000>; + regulator-max-microvolt = <2210000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_s9c: smps9 { + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l1c: ldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2c: ldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1950000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l3c: ldo3 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4c: ldo4 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5c: ldo5 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6c: ldo6 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7c: ldo7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8c: ldo8 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9c: ldo9 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l10c: ldo10 { + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l11c: ldo11 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l12c: ldo12 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l13c: ldo13 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; + }; + }; +}; + +&gcc { + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, + <GCC_EDP_CLKREF_EN>, + <GCC_MSS_CFG_AHB_CLK>, + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, + <GCC_MSS_OFFLINE_AXI_CLK>, + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, + <GCC_MSS_SNOC_AXI_CLK>, + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <GCC_QSPI_CORE_CLK>, + <GCC_QSPI_CORE_CLK_SRC>, + <GCC_SEC_CTRL_CLK_SRC>, + <GCC_WPSS_AHB_BDG_MST_CLK>, + <GCC_WPSS_AHB_CLK>, + <GCC_WPSS_RSCP_CLK>; +}; + +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&gpu_zap_shader { + firmware-name = "qcom/qcm6490/SHIFT/otter/a660_zap.mbn"; +}; + +&i2c1 { + status = "okay"; + + /* PM8008 PMIC @ 8 and 9 */ + /* rtc6226 FM receiver @ 64 */ + + typec-mux@42 { + compatible = "fcs,fsa4480"; + reg = <0x42>; + + vcc-supply = <&vreg_bob>; + + mode-switch; + orientation-switch; + + port { + fsa4480_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_sbu>; + }; + }; + }; +}; + +&i2c4 { + status = "okay"; + + /* tas2563 audio codec @ 4d */ +}; + +&i2c9 { + status = "okay"; + + /* TMS(?) NFC @ 28 */ + /* Ti drv2624 haptics @ 5a */ +}; + +&i2c13 { + status = "okay"; + + /* focaltech FT3658U @ 38 */ +}; + +&ipa { + qcom,gsi-loader = "self"; + memory-region = <&ipa_fw_mem>; + firmware-name = "qcom/qcm6490/SHIFT/otter/ipa_fws.mbn"; + status = "okay"; +}; + +&pm7250b_adc { + channel@4d { + reg = <ADC5_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "charger_skin_therm"; + }; + + channel@4f { + reg = <ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "conn_therm"; + }; +}; + +&pm7250b_adc_tm { + status = "okay"; + + charger-skin-therm@0 { + reg = <0>; + io-channels = <&pm7250b_adc ADC5_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + conn-therm@1 { + reg = <1>; + io-channels = <&pm7250b_adc ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + +&pm7325_gpios { + volume_down_default: volume-down-default-state { + pins = "gpio6"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = <1>; + bias-pull-up; + input-enable; + }; +}; + +&pmk8350_adc_tm { + status = "okay"; + + xo-therm@0 { + reg = <0>; + io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + quiet-therm@1 { + reg = <1>; + io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + cam-flash-therm@2 { + reg = <2>; + io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + sdm-skin-therm@3 { + reg = <3>; + io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + wide-rfc-therm@4 { + reg = <4>; + io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM4_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + +&pmk8350_rtc { + status = "okay"; +}; + +&pmk8350_vadc { + status = "okay"; + + channel@44 { + reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "pmk8350_xo_therm"; + }; + + channel@144 { + reg = <PM7325_ADC7_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "pm7325_quiet_therm"; + }; + + channel@145 { + reg = <PM7325_ADC7_AMUX_THM2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "pm7325_cam_flash_therm"; + }; + + channel@146 { + reg = <PM7325_ADC7_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "pm7325_sdm_skin_therm"; + }; + + channel@147 { + reg = <PM7325_ADC7_AMUX_THM4_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + label = "pm7325_wide_rfc_therm"; + }; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + linux,code = <KEY_VOLUMEDOWN>; + status = "okay"; +}; + +&qup_spi13_cs { + drive-strength = <6>; + bias-disable; +}; + +&qup_spi13_data_clk { + drive-strength = <6>; + bias-disable; +}; + +&qup_uart5_rx { + drive-strength = <2>; + bias-disable; +}; + +&qup_uart5_tx { + drive-strength = <2>; + bias-disable; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&remoteproc_adsp { + firmware-name = "qcom/qcm6490/SHIFT/otter/adsp.mbn"; + status = "okay"; +}; + +&remoteproc_cdsp { + firmware-name = "qcom/qcm6490/SHIFT/otter/cdsp.mbn"; + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/qcm6490/SHIFT/otter/modem.mbn"; + status = "okay"; +}; + +&remoteproc_wpss { + firmware-name = "qcom/qcm6490/SHIFT/otter/wpss.mbn"; +}; + +&sdc2_clk { + drive-strength = <16>; + bias-disable; +}; + +&sdc2_cmd { + drive-strength = <10>; + bias-pull-up; +}; + +&sdc2_data { + drive-strength = <10>; + bias-pull-up; +}; + +&sdhc_2 { + vmmc-supply = <&vreg_l9c>; + vqmmc-supply = <&vreg_l6c>; + + pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>; + pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>; + + status = "okay"; +}; + +&tlmm { + /* + * 48-52: protected by XPU, not sure why. + */ + gpio-reserved-ranges = <48 4>; + + bluetooth_enable_default: bluetooth-enable-default-state { + pins = "gpio85"; + function = "gpio"; + output-low; + bias-disable; + }; + + qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { + pins = "gpio28"; + function = "gpio"; + /* + * Configure a bias-bus-hold on CTS to lower power + * usage when Bluetooth is turned off. Bus hold will + * maintain a low power state regardless of whether + * the Bluetooth module drives the pin in either + * direction or leaves the pin fully unpowered. + */ + bias-bus-hold; + }; + + qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { + pins = "gpio29"; + function = "gpio"; + /* + * Configure pull-down on RTS. As RTS is active low + * signal, pull it low to indicate the BT SoC that it + * can wakeup the system anytime from suspend state by + * pulling RX low (by sending wakeup bytes). + */ + bias-pull-down; + }; + + qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { + pins = "gpio30"; + function = "gpio"; + /* + * Configure pull-up on TX when it isn't actively driven + * to prevent BT SoC from receiving garbage during sleep. + */ + bias-pull-up; + }; + + qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { + pins = "gpio31"; + function = "gpio"; + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module + * is floating which may cause spurious wakeups. + */ + bias-pull-up; + }; + + sw_ctrl_default: sw-ctrl-default-state { + pins = "gpio86"; + function = "gpio"; + bias-pull-down; + }; +}; + +&uart5 { + compatible = "qcom,geni-debug-uart"; + status = "okay"; +}; + +&uart7 { + /delete-property/interrupts; + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; + pinctrl-names = "default", "sleep"; + + status = "okay"; + + bluetooth: bluetooth { + compatible = "qcom,wcn6750-bt"; + + pinctrl-0 = <&bluetooth_enable_default>, <&sw_ctrl_default>; + pinctrl-names = "default"; + + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; + + vddio-supply = <&vreg_l19b>; + vddaon-supply = <&vreg_s7b>; + vddbtcxmx-supply = <&vreg_s7b>; + vddrfacmn-supply = <&vreg_s7b>; + vddrfa0p8-supply = <&vreg_s7b>; + vddrfa1p7-supply = <&vreg_s1b>; + vddrfa1p2-supply = <&vreg_s8b>; + vddrfa2p2-supply = <&vreg_s1c>; + vddasd-supply = <&vreg_l11c>; + + max-speed = <3200000>; + }; +}; + +&ufs_mem_hc { + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l7b>; + vcc-max-microamp = <800000>; + /* + * Technically l9b enables an eLDO (supplied by s1b) which then powers + * VCCQ2 of the UFS. + */ + vccq-supply = <&vreg_l9b>; + vccq-max-microamp = <900000>; + + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l10c>; + vdda-pll-supply = <&vreg_l6b>; + + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "otg"; + usb-role-switch; +}; + +&usb_1_dwc3_hs { + remote-endpoint = <&pmic_glink_hs_in>; +}; + +&usb_dp_qmpphy_out { + remote-endpoint = <&pmic_glink_ss_in>; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l10c>; + vdda18-supply = <&vreg_l1c>; + vdda33-supply = <&vreg_l2b>; + + qcom,hs-crossover-voltage-microvolt = <28000>; + qcom,hs-output-impedance-micro-ohms = <2600000>; + qcom,hs-rise-fall-time-bp = <5430>; + qcom,hs-disconnect-bp = <1743>; + qcom,hs-amplitude-bp = <2430>; + + qcom,pre-emphasis-amplitude-bp = <20000>; + qcom,pre-emphasis-duration-bp = <20000>; + + qcom,squelch-detector-bp = <(-2090)>; + + orientation-switch; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l6b>; + vdda-pll-supply = <&vreg_l1b>; + + status = "okay"; +}; + +&wifi { + qcom,ath11k-calibration-variant = "SHIFTphone_8"; +}; -- 2.45.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: add QCM6490 SHIFTphone 8 2024-05-20 15:29 ` [PATCH v2 2/2] arm64: dts: qcom: add " Caleb Connolly @ 2024-05-21 8:10 ` Luca Weiss 0 siblings, 0 replies; 5+ messages in thread From: Luca Weiss @ 2024-05-21 8:10 UTC (permalink / raw) To: Caleb Connolly, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Alexander Martinz, ~postmarketos/upstreaming, linux-arm-msm, devicetree, linux-kernel On Mon May 20, 2024 at 5:29 PM CEST, Caleb Connolly wrote: > The SHIFTphone 8 is an upcoming QCM6490 smartphone, it has the following > features: > > * 12GB of RAM, 512GB UFS storage > * 1080p display. > * Hardware kill switches for cameras and microphones > * UART access via type-c SBU pins (enabled by an internal switch) > > Initial support includes: > > * Framebuffer display > * UFS and sdcard storage > * Battery monitoring and USB role switching via pmic glink > * Bluetooth > * Thermals > * Wifi > > Signed-off-by: Caleb Connolly <caleb@postmarketos.org> > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts | 923 +++++++++++++++++++++++ > 2 files changed, 924 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 7d40ec5e7d21..678e800ac797 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -92,8 +92,9 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcm6490-fairphone-fp5.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb > +dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > diff --git a/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts > new file mode 100644 > index 000000000000..72ce2b0ee2f4 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts > @@ -0,0 +1,923 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2023, Luca Weiss <luca.weiss@fairphone.com> > + * Copyright (c) 2024, Caleb Connolly <caleb@postmarketos.org> > + */ > + > +/dts-v1/; > + > +#define PM7250B_SID 8 > +#define PM7250B_SID1 9 > + > +#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h> > +#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> > +#include <dt-bindings/leds/common.h> > +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> > +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> > +#include "sc7280.dtsi" > +#include "pm7250b.dtsi" > +#include "pm7325.dtsi" > +#include "pm8350c.dtsi" /* PM7350C */ > +#include "pmk8350.dtsi" /* PMK7325 */ > + > +/delete-node/ &rmtfs_mem; > + > +/ { > + model = "SHIFT SHIFTphone 8"; > + compatible = "shift,otter", "qcom,qcm6490"; > + chassis-type = "handset"; > + > + aliases { > + serial0 = &uart5; > + serial1 = &uart7; > + }; > + > + chosen { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + stdout-path = "serial0:115200n8"; > + > + framebuffer0: framebuffer@a000000 { > + compatible = "simple-framebuffer"; > + reg = <0x0 0xe1000000 0x0 (2400 * 1080 * 4)>; > + width = <1080>; > + height = <2400>; > + stride = <(1080 * 4)>; > + format = "a8r8g8b8"; > + clocks = <&gcc GCC_DISP_HF_AXI_CLK>; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + pinctrl-0 = <&volume_down_default>; > + pinctrl-names = "default"; > + > + key-volume-up { > + label = "Volume up"; > + gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; > + linux,code = <KEY_VOLUMEUP>; > + debounce-interval = <15>; > + }; > + }; > + > + pmic-glink { > + compatible = "qcom,qcm6490-pmic-glink", "qcom,pmic-glink"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + connector@0 { > + compatible = "usb-c-connector"; > + reg = <0>; > + power-role = "dual"; > + data-role = "dual"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + pmic_glink_hs_in: endpoint { > + remote-endpoint = <&usb_1_dwc3_hs>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + pmic_glink_ss_in: endpoint { > + remote-endpoint = <&usb_dp_qmpphy_out>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + pmic_glink_sbu: endpoint { > + remote-endpoint = <&fsa4480_sbu_mux>; > + }; > + }; > + }; > + }; > + }; > + > + reserved-memory { > + cont_splash_mem: cont-splash@e1000000 { > + reg = <0x0 0xe1000000 0x0 0x2300000>; > + no-map; > + }; > + > + cdsp_mem: cdsp@88f00000 { > + reg = <0x0 0x88f00000 0x0 0x1e00000>; > + no-map; > + }; > + > + rmtfs_mem: rmtfs@f8500000 { > + compatible = "qcom,rmtfs-mem"; > + reg = <0x0 0xf8500000 0x0 0x600000>; > + no-map; > + > + qcom,client-id = <1>; > + qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>, <QCOM_SCM_VMID_NAV>; > + }; > + }; > + > + thermal-zones { > + camera-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; Hi Caleb, Just remembered there's a series from Konrad removing these if they're 0, but based on the replies I'm not sure how accepted that is yet. https://lore.kernel.org/linux-arm-msm/20240510-topic-msm-polling-cleanup-v2-17-436ca4218da2@linaro.org/ > + thermal-sensors = <&pmk8350_adc_tm 2>; > + > + trips { > + active-config0 { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; > + }; > + }; > + > + chg-skin-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&pm7250b_adc_tm 0>; > + > + trips { > + active-config0 { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; > + }; > + }; > + > + conn-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&pm7250b_adc_tm 1>; > + > + trips { > + active-config0 { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; > + }; > + }; > + > + quiet-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&pmk8350_adc_tm 1>; > + > + trips { > + active-config0 { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; > + }; > + }; > + > + rear-cam-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&pmk8350_adc_tm 4>; > + > + trips { > + active-config0 { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; > + }; > + }; > + > + sdm-skin-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&pmk8350_adc_tm 3>; > + > + trips { > + active-config0 { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; > + }; > + }; > + > + xo-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&pmk8350_adc_tm 0>; > + > + trips { > + active-config0 { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; > + }; > + }; > + }; > +}; > + > +&apps_rsc { > + regulators-0 { > + compatible = "qcom,pm7325-rpmh-regulators"; > + qcom,pmic-id = "b"; > + > + vreg_s1b: smps1 { > + regulator-min-microvolt = <1840000>; > + regulator-max-microvolt = <2040000>; > + }; > + > + vreg_s7b: smps7 { > + regulator-min-microvolt = <535000>; > + regulator-max-microvolt = <1120000>; > + }; > + > + vreg_s8b: smps8 { > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1500000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; > + }; > + > + vreg_l1b: ldo1 { > + regulator-min-microvolt = <825000>; > + regulator-max-microvolt = <925000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l2b: ldo2 { > + regulator-min-microvolt = <2700000>; > + regulator-max-microvolt = <3544000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l3b: ldo3 { > + regulator-min-microvolt = <312000>; > + regulator-max-microvolt = <910000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l6b: ldo6 { > + regulator-min-microvolt = <1140000>; > + regulator-max-microvolt = <1260000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7b: ldo7 { > + /* Constrained for UFS VCC, at least until UFS driver scales voltage */ > + regulator-min-microvolt = <2952000>; > + regulator-max-microvolt = <2952000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l8b: ldo8 { > + regulator-min-microvolt = <870000>; > + regulator-max-microvolt = <970000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9b: ldo9 { > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1304000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l11b: ldo11 { > + regulator-min-microvolt = <1504000>; > + regulator-max-microvolt = <2000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l12b: ldo12 { > + regulator-min-microvolt = <751000>; > + regulator-max-microvolt = <824000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l13b: ldo13 { > + regulator-min-microvolt = <530000>; > + regulator-max-microvolt = <824000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l14b: ldo14 { > + regulator-min-microvolt = <1080000>; > + regulator-max-microvolt = <1304000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l15b: ldo15 { > + regulator-min-microvolt = <765000>; > + regulator-max-microvolt = <1020000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l16b: ldo16 { > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1300000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l17b: ldo17 { > + regulator-min-microvolt = <1700000>; > + regulator-max-microvolt = <1900000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l18b: ldo18 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <2000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l19b: ldo19 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <2000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > + > + regulators-1 { > + compatible = "qcom,pm8350c-rpmh-regulators"; > + qcom,pmic-id = "c"; > + > + vreg_s1c: smps1 { > + regulator-min-microvolt = <2190000>; > + regulator-max-microvolt = <2210000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_s9c: smps9 { > + regulator-min-microvolt = <1010000>; > + regulator-max-microvolt = <1170000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l1c: ldo1 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1980000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l2c: ldo2 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1950000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l3c: ldo3 { > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3400000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l4c: ldo4 { > + regulator-min-microvolt = <1620000>; > + regulator-max-microvolt = <3300000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l5c: ldo5 { > + regulator-min-microvolt = <1620000>; > + regulator-max-microvolt = <3300000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l6c: ldo6 { > + regulator-min-microvolt = <1650000>; > + regulator-max-microvolt = <3544000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7c: ldo7 { > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3544000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l8c: ldo8 { > + regulator-min-microvolt = <1620000>; > + regulator-max-microvolt = <2000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9c: ldo9 { > + regulator-min-microvolt = <2700000>; > + regulator-max-microvolt = <3544000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l10c: ldo10 { > + regulator-min-microvolt = <720000>; > + regulator-max-microvolt = <1050000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l11c: ldo11 { > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <3544000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l12c: ldo12 { > + regulator-min-microvolt = <1650000>; > + regulator-max-microvolt = <2000000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l13c: ldo13 { > + regulator-min-microvolt = <2700000>; > + regulator-max-microvolt = <3544000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_bob: bob { > + regulator-min-microvolt = <3008000>; > + regulator-max-microvolt = <3960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; > + }; > + }; > +}; > + > +&gcc { > + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, > + <GCC_EDP_CLKREF_EN>, > + <GCC_MSS_CFG_AHB_CLK>, > + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, I think these are not properly aligned, right? > + <GCC_MSS_OFFLINE_AXI_CLK>, > + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, > + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, > + <GCC_MSS_SNOC_AXI_CLK>, > + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > + <GCC_QSPI_CORE_CLK>, > + <GCC_QSPI_CORE_CLK_SRC>, > + <GCC_SEC_CTRL_CLK_SRC>, > + <GCC_WPSS_AHB_BDG_MST_CLK>, > + <GCC_WPSS_AHB_CLK>, > + <GCC_WPSS_RSCP_CLK>; > +}; > + > +&gpi_dma0 { > + status = "okay"; > +}; > + > +&gpi_dma1 { > + status = "okay"; > +}; > + > +&gpu { > + status = "okay"; > +}; > + > +&gpu_zap_shader { > + firmware-name = "qcom/qcm6490/SHIFT/otter/a660_zap.mbn"; > +}; > + > +&i2c1 { > + status = "okay"; > + > + /* PM8008 PMIC @ 8 and 9 */ Fingers crossed PM8008 gets accepted soon :) https://lore.kernel.org/linux-arm-msm/20240506150830.23709-1-johan+linaro@kernel.org/ > + /* rtc6226 FM receiver @ 64 */ > + > + typec-mux@42 { > + compatible = "fcs,fsa4480"; > + reg = <0x42>; > + > + vcc-supply = <&vreg_bob>; > + > + mode-switch; > + orientation-switch; > + > + port { > + fsa4480_sbu_mux: endpoint { > + remote-endpoint = <&pmic_glink_sbu>; > + }; > + }; > + }; > +}; > + > +&i2c4 { > + status = "okay"; > + > + /* tas2563 audio codec @ 4d */ > +}; > + > +&i2c9 { > + status = "okay"; > + > + /* TMS(?) NFC @ 28 */ > + /* Ti drv2624 haptics @ 5a */ > +}; > + > +&i2c13 { > + status = "okay"; > + > + /* focaltech FT3658U @ 38 */ > +}; > + > +&ipa { > + qcom,gsi-loader = "self"; > + memory-region = <&ipa_fw_mem>; > + firmware-name = "qcom/qcm6490/SHIFT/otter/ipa_fws.mbn"; > + status = "okay"; > +}; > + > +&pm7250b_adc { > + channel@4d { > + reg = <ADC5_AMUX_THM1_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + qcom,pre-scaling = <1 1>; > + label = "charger_skin_therm"; > + }; > + > + channel@4f { > + reg = <ADC5_AMUX_THM3_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + qcom,pre-scaling = <1 1>; > + label = "conn_therm"; > + }; > +}; > + > +&pm7250b_adc_tm { > + status = "okay"; > + > + charger-skin-therm@0 { > + reg = <0>; > + io-channels = <&pm7250b_adc ADC5_AMUX_THM1_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > + > + conn-therm@1 { > + reg = <1>; > + io-channels = <&pm7250b_adc ADC5_AMUX_THM3_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > +}; > + > +&pm7325_gpios { > + volume_down_default: volume-down-default-state { > + pins = "gpio6"; > + function = PMIC_GPIO_FUNC_NORMAL; > + power-source = <1>; > + bias-pull-up; > + input-enable; > + }; > +}; > + > +&pmk8350_adc_tm { > + status = "okay"; > + > + xo-therm@0 { > + reg = <0>; > + io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > + > + quiet-therm@1 { > + reg = <1>; > + io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > + > + cam-flash-therm@2 { > + reg = <2>; > + io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM2_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > + > + sdm-skin-therm@3 { > + reg = <3>; > + io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > + > + wide-rfc-therm@4 { > + reg = <4>; > + io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM4_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time-us = <200>; > + }; > +}; > + > +&pmk8350_rtc { > + status = "okay"; > +}; > + > +&pmk8350_vadc { > + status = "okay"; > + > + channel@44 { > + reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + qcom,pre-scaling = <1 1>; > + label = "pmk8350_xo_therm"; > + }; > + > + channel@144 { > + reg = <PM7325_ADC7_AMUX_THM1_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + qcom,pre-scaling = <1 1>; > + label = "pm7325_quiet_therm"; > + }; > + > + channel@145 { > + reg = <PM7325_ADC7_AMUX_THM2_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + qcom,pre-scaling = <1 1>; > + label = "pm7325_cam_flash_therm"; > + }; > + > + channel@146 { > + reg = <PM7325_ADC7_AMUX_THM3_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + qcom,pre-scaling = <1 1>; > + label = "pm7325_sdm_skin_therm"; > + }; > + > + channel@147 { > + reg = <PM7325_ADC7_AMUX_THM4_100K_PU>; > + qcom,ratiometric; > + qcom,hw-settle-time = <200>; > + qcom,pre-scaling = <1 1>; > + label = "pm7325_wide_rfc_therm"; > + }; > +}; > + > +&pon_pwrkey { > + status = "okay"; > +}; > + > +&pon_resin { > + linux,code = <KEY_VOLUMEDOWN>; > + status = "okay"; > +}; > + > +&qup_spi13_cs { > + drive-strength = <6>; > + bias-disable; > +}; > + > +&qup_spi13_data_clk { > + drive-strength = <6>; > + bias-disable; > +}; > + > +&qup_uart5_rx { > + drive-strength = <2>; > + bias-disable; > +}; > + > +&qup_uart5_tx { > + drive-strength = <2>; > + bias-disable; > +}; > + > +&qupv3_id_0 { > + status = "okay"; > +}; > + > +&qupv3_id_1 { > + status = "okay"; > +}; > + > +&remoteproc_adsp { > + firmware-name = "qcom/qcm6490/SHIFT/otter/adsp.mbn"; > + status = "okay"; > +}; > + > +&remoteproc_cdsp { > + firmware-name = "qcom/qcm6490/SHIFT/otter/cdsp.mbn"; > + status = "okay"; > +}; > + > +&remoteproc_mpss { > + firmware-name = "qcom/qcm6490/SHIFT/otter/modem.mbn"; > + status = "okay"; > +}; > + > +&remoteproc_wpss { > + firmware-name = "qcom/qcm6490/SHIFT/otter/wpss.mbn"; This needs status = enabled, no? > +}; > + > +&sdc2_clk { > + drive-strength = <16>; > + bias-disable; > +}; > + > +&sdc2_cmd { > + drive-strength = <10>; > + bias-pull-up; > +}; > + > +&sdc2_data { > + drive-strength = <10>; > + bias-pull-up; > +}; > + > +&sdhc_2 { > + vmmc-supply = <&vreg_l9c>; > + vqmmc-supply = <&vreg_l6c>; > + > + pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>; > + pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>; > + > + status = "okay"; > +}; > + > +&tlmm { > + /* > + * 48-52: protected by XPU, not sure why. > + */ > + gpio-reserved-ranges = <48 4>; > + > + bluetooth_enable_default: bluetooth-enable-default-state { > + pins = "gpio85"; > + function = "gpio"; > + output-low; > + bias-disable; > + }; > + > + qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { > + pins = "gpio28"; > + function = "gpio"; > + /* > + * Configure a bias-bus-hold on CTS to lower power > + * usage when Bluetooth is turned off. Bus hold will > + * maintain a low power state regardless of whether > + * the Bluetooth module drives the pin in either > + * direction or leaves the pin fully unpowered. > + */ > + bias-bus-hold; > + }; > + > + qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { > + pins = "gpio29"; > + function = "gpio"; > + /* > + * Configure pull-down on RTS. As RTS is active low > + * signal, pull it low to indicate the BT SoC that it > + * can wakeup the system anytime from suspend state by > + * pulling RX low (by sending wakeup bytes). > + */ > + bias-pull-down; > + }; > + > + qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { > + pins = "gpio30"; > + function = "gpio"; > + /* > + * Configure pull-up on TX when it isn't actively driven > + * to prevent BT SoC from receiving garbage during sleep. > + */ > + bias-pull-up; > + }; > + > + qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { > + pins = "gpio31"; > + function = "gpio"; > + /* > + * Configure a pull-up on RX. This is needed to avoid > + * garbage data when the TX pin of the Bluetooth module > + * is floating which may cause spurious wakeups. > + */ > + bias-pull-up; > + }; > + > + sw_ctrl_default: sw-ctrl-default-state { > + pins = "gpio86"; > + function = "gpio"; > + bias-pull-down; > + }; > +}; > + > +&uart5 { > + compatible = "qcom,geni-debug-uart"; > + status = "okay"; > +}; > + > +&uart7 { > + /delete-property/interrupts; > + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, > + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; > + > + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; > + pinctrl-names = "default", "sleep"; > + > + status = "okay"; > + > + bluetooth: bluetooth { > + compatible = "qcom,wcn6750-bt"; > + > + pinctrl-0 = <&bluetooth_enable_default>, <&sw_ctrl_default>; > + pinctrl-names = "default"; > + > + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; > + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; > + > + vddio-supply = <&vreg_l19b>; > + vddaon-supply = <&vreg_s7b>; > + vddbtcxmx-supply = <&vreg_s7b>; > + vddrfacmn-supply = <&vreg_s7b>; > + vddrfa0p8-supply = <&vreg_s7b>; > + vddrfa1p7-supply = <&vreg_s1b>; > + vddrfa1p2-supply = <&vreg_s8b>; > + vddrfa2p2-supply = <&vreg_s1c>; > + vddasd-supply = <&vreg_l11c>; > + > + max-speed = <3200000>; > + }; > +}; > + > +&ufs_mem_hc { > + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; > + > + vcc-supply = <&vreg_l7b>; > + vcc-max-microamp = <800000>; > + /* > + * Technically l9b enables an eLDO (supplied by s1b) which then powers > + * VCCQ2 of the UFS. > + */ > + vccq-supply = <&vreg_l9b>; > + vccq-max-microamp = <900000>; > + > + status = "okay"; > +}; > + > +&ufs_mem_phy { > + vdda-phy-supply = <&vreg_l10c>; > + vdda-pll-supply = <&vreg_l6b>; > + > + status = "okay"; > +}; > + > +&usb_1 { > + status = "okay"; > +}; > + > +&usb_1_dwc3 { > + dr_mode = "otg"; > + usb-role-switch; > +}; > + > +&usb_1_dwc3_hs { > + remote-endpoint = <&pmic_glink_hs_in>; > +}; > + > +&usb_dp_qmpphy_out { > + remote-endpoint = <&pmic_glink_ss_in>; > +}; > + > +&usb_1_hsphy { > + vdda-pll-supply = <&vreg_l10c>; > + vdda18-supply = <&vreg_l1c>; > + vdda33-supply = <&vreg_l2b>; > + > + qcom,hs-crossover-voltage-microvolt = <28000>; > + qcom,hs-output-impedance-micro-ohms = <2600000>; > + qcom,hs-rise-fall-time-bp = <5430>; > + qcom,hs-disconnect-bp = <1743>; > + qcom,hs-amplitude-bp = <2430>; > + > + qcom,pre-emphasis-amplitude-bp = <20000>; > + qcom,pre-emphasis-duration-bp = <20000>; > + > + qcom,squelch-detector-bp = <(-2090)>; > + > + orientation-switch; > + > + status = "okay"; > +}; > + > +&usb_1_qmpphy { > + vdda-phy-supply = <&vreg_l6b>; > + vdda-pll-supply = <&vreg_l1b>; > + > + status = "okay"; > +}; > + > +&wifi { > + qcom,ath11k-calibration-variant = "SHIFTphone_8"; Also this needs to be enabled, no? With this fixed, please add my: Reviewed-by: Luca Weiss <luca.weiss@fairphone.com> > +}; ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/2] qcom: initial support for the SHIFTphone 8 2024-05-20 15:29 [PATCH v2 0/2] qcom: initial support for the SHIFTphone 8 Caleb Connolly 2024-05-20 15:29 ` [PATCH v2 1/2] dt-bindings: arm: qcom: Add QCM6490 " Caleb Connolly 2024-05-20 15:29 ` [PATCH v2 2/2] arm64: dts: qcom: add " Caleb Connolly @ 2024-05-21 12:53 ` Rob Herring (Arm) 2 siblings, 0 replies; 5+ messages in thread From: Rob Herring (Arm) @ 2024-05-21 12:53 UTC (permalink / raw) To: Caleb Connolly Cc: Bjorn Andersson, Konrad Dybcio, linux-kernel, Conor Dooley, devicetree, Krzysztof Kozlowski, ~postmarketos/upstreaming, Krzysztof Kozlowski, Alexander Martinz, linux-arm-msm, Luca Weiss On Mon, 20 May 2024 17:29:40 +0200, Caleb Connolly wrote: > The SHIFTphone 8 is an upcoming QCM6490 smartphone, it has the following > features: > > * 12GB of RAM, 512GB UFS storage > * 1080p display. > * Hardware kill switches for cameras and microphones > * UART access via type-c SBU pins (enabled by an internal switch) > > Initial support includes: > > * Framebuffer display > * UFS and sdcard storage > * Battery monitoring and USB role switching via pmic glink > * Bluetooth > * Thermals > > Wifi works but requires some commits to be reverted to prevent a > firmware crash. > > The serial port on the device can be accessed via the usb-cereal > adapter, it must first be enabled by flipping the switch under the > display. Additional info can be found on the postmarketOS wiki page. > > https://wiki.postmarketos.org/wiki/SHIFT_SHIFTphone_8_(shift-otter) > > --- > Changes in v2: > - Fix authorship > - Address Luca's feedback > - Link to v1: https://lore.kernel.org/r/20240508-otter-bringup-v1-0-c807d3d931f6@linaro.org > > --- > Caleb Connolly (2): > dt-bindings: arm: qcom: Add QCM6490 SHIFTphone 8 > arm64: dts: qcom: add QCM6490 SHIFTphone 8 > > Documentation/devicetree/bindings/arm/qcom.yaml | 1 + > arch/arm64/boot/dts/qcom/Makefile | 1 + > arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts | 923 +++++++++++++++++++++++ > 3 files changed, 925 insertions(+) > --- > change-id: 20240507-otter-bringup-388cf3aa7ca5 > base-commit: a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6 > > // Caleb (they/them) > > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade New warnings running 'make CHECK_DTBS=y qcom/qcm6490-shift-otter.dtb' for 20240520-otter-bringup-v2-0-d717d1dab6b8@linaro.org: arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dtb: pcie@1c08000: interrupts: [[0, 307, 4], [0, 308, 4], [0, 309, 4], [0, 312, 4], [0, 313, 4], [0, 314, 4], [0, 374, 4], [0, 375, 4]] is too long from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml# arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dtb: pcie@1c08000: interrupt-names:0: 'msi' was expected from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml# arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dtb: pcie@1c08000: interrupt-names: ['msi0', 'msi1', 'msi2', 'msi3', 'msi4', 'msi5', 'msi6', 'msi7'] is too long from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml# arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dtb: phy@88e3000: 'orientation-switch' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml# arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dtb: usb@8cf8800: interrupt-names: ['pwr_event', 'hs_phy_irq', 'dp_hs_phy_irq', 'dm_hs_phy_irq'] is too short from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dtb: video-codec@aa00000: iommus: [[65, 8576, 32]] is too short from schema $id: http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml# ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-05-21 12:53 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-05-20 15:29 [PATCH v2 0/2] qcom: initial support for the SHIFTphone 8 Caleb Connolly 2024-05-20 15:29 ` [PATCH v2 1/2] dt-bindings: arm: qcom: Add QCM6490 " Caleb Connolly 2024-05-20 15:29 ` [PATCH v2 2/2] arm64: dts: qcom: add " Caleb Connolly 2024-05-21 8:10 ` Luca Weiss 2024-05-21 12:53 ` [PATCH v2 0/2] qcom: initial support for the " Rob Herring (Arm)
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