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smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=COcLBCX1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="COcLBCX1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D44D8C2BD10; Mon, 20 May 2024 21:07:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716239251; bh=X/NsTjluZhFUIdDleKVBp6yB9DdSZqAO99eq3Zz04l8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=COcLBCX11lfP8lavHY9s/toyqvSg0NurL5PdVAePq5mib/NEy463Muej/HOax+eLx y8tUmti4dWfu3xUUT+aiN0V10wxnYLZfqx9/Kzft/yecuvlfWMcGGJS7dDETp4Nnj8 oVse2C/FFlqR3oqzMmYrRH5KxPD0iQV2czPJvL620Ch4JyYAVSibMURUAhvbSqboem Ci/mnOigC+B/TR0Xqkvbdt19uMeQ6aXidSreVnfpI5Mh6mgKokpZxSIwcqp9pzYgBH cl3QgPwYIGSdITwSDB8ClhtRg2cjspJ3W6Rfg7htOz20Qct3H+qHF4S504N971qnHD yhFPwYQzEcTGw== Date: Mon, 20 May 2024 16:07:29 -0500 From: Rob Herring To: Krzysztof Kozlowski Cc: Lee Jones , Krzysztof Kozlowski , Conor Dooley , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Nishanth Menon , Matthias Brugger , AngeloGioacchino Del Regno , Jiaxun Yang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH 3/8] dt-bindings: soc: intel: lgm-syscon: Move to dedicated schema Message-ID: <20240520210729.GA1509114-robh@kernel.org> References: <20240519-dt-bindings-mfd-syscon-split-v1-0-aaf996e2313a@linaro.org> <20240519-dt-bindings-mfd-syscon-split-v1-3-aaf996e2313a@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240519-dt-bindings-mfd-syscon-split-v1-3-aaf996e2313a@linaro.org> On Sun, May 19, 2024 at 08:42:18PM +0200, Krzysztof Kozlowski wrote: > intel,lgm-syscon is not a simple syscon device - it has children - thus > it should be fully documented in its own binding. > > Signed-off-by: Krzysztof Kozlowski > > --- > > Context might depend on > https://lore.kernel.org/r/20240510123018.3902184-1-robh@kernel.org > and also further patches here depend on this one. > --- > Documentation/devicetree/bindings/mfd/syscon.yaml | 1 - > .../bindings/soc/intel/intel,lgm-syscon.yaml | 53 ++++++++++++++++++++++ > 2 files changed, 53 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml > index 622ea0f1b08e..5a0aeae24a50 100644 > --- a/Documentation/devicetree/bindings/mfd/syscon.yaml > +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml > @@ -77,7 +77,6 @@ properties: > - hisilicon,pcie-sas-subctrl > - hisilicon,peri-subctrl > - hpe,gxp-sysreg > - - intel,lgm-syscon > - loongson,ls1b-syscon > - loongson,ls1c-syscon > - lsi,axxia-syscon > diff --git a/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml > new file mode 100644 > index 000000000000..aa8d24074fd7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel Lightning Mountain(LGM) Syscon > + > +maintainers: > + - Ramuthevar Vadivel Murugan > + > +properties: > + compatible: > + items: > + - const: intel,lgm-syscon > + - const: syscon > + > + reg: > + maxItems: 1 > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 Should have ranges. > + > +patternProperties: > + "^emmc-phy@[0-9a-f]+$": > + $ref: /schemas/phy/intel,lgm-emmc-phy.yaml# > + > +required: > + - compatible > + - reg > + - "#address-cells" > + - "#size-cells" > + > +additionalProperties: false > + > +examples: > + - | > + chiptop@e0200000 { > + compatible = "intel,lgm-syscon", "syscon"; > + reg = <0xe0200000 0x100>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + emmc-phy@a8 { > + compatible = "intel,lgm-emmc-phy"; > + reg = <0x00a8 0x10>; > + clocks = <&emmc>; > + #phy-cells = <0>; > + }; > + }; > > -- > 2.43.0 >