From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Robert Marko <robimarko@gmail.com>,
Das Srinagesh <quic_gurus@quicinc.com>,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
Maximilian Luz <luzmaximilian@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Srini Kandagatla <srinivas.kandagatla@linaro.org>,
Arnd Bergmann <arnd@arndb.de>,
Elliot Berman <quic_eberman@quicinc.com>,
Alex Elder <elder@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel@quicinc.com,
Andrew Halaney <ahalaney@redhat.com>,
Deepti Jaggi <quic_djaggi@quicinc.com>
Subject: [PATCH v10 10/15] firmware: qcom: scm: add support for SHM bridge operations
Date: Mon, 27 May 2024 14:55:00 +0200 [thread overview]
Message-ID: <20240527-shm-bridge-v10-10-ce7afaa58d3a@linaro.org> (raw)
In-Reply-To: <20240527-shm-bridge-v10-0-ce7afaa58d3a@linaro.org>
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
SHM Bridge is a safety mechanism allowing to limit the amount of memory
shared between the kernel and the TrustZone to regions explicitly marked
as such.
Add low-level primitives for enabling SHM bridge support as well as
creating and destroying SHM bridges to qcom-scm.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Andrew Halaney <ahalaney@redhat.com>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sc8280xp-lenovo-thinkpad-x13s
Tested-by: Deepti Jaggi <quic_djaggi@quicinc.com> #sa8775p-ride
Reviewed-by: Elliot Berman <quic_eberman@quicinc.com>
---
drivers/firmware/qcom/qcom_scm.c | 60 ++++++++++++++++++++++++++++++++++
drivers/firmware/qcom/qcom_scm.h | 3 ++
include/linux/firmware/qcom/qcom_scm.h | 6 ++++
3 files changed, 69 insertions(+)
diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
index 04131e60b63a..94c34cde8179 100644
--- a/drivers/firmware/qcom/qcom_scm.c
+++ b/drivers/firmware/qcom/qcom_scm.c
@@ -1344,6 +1344,66 @@ bool qcom_scm_lmh_dcvsh_available(void)
}
EXPORT_SYMBOL_GPL(qcom_scm_lmh_dcvsh_available);
+int qcom_scm_shm_bridge_enable(void)
+{
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_SVC_MP,
+ .cmd = QCOM_SCM_MP_SHM_BRIDGE_ENABLE,
+ .owner = ARM_SMCCC_OWNER_SIP
+ };
+
+ struct qcom_scm_res res;
+
+ if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_MP,
+ QCOM_SCM_MP_SHM_BRIDGE_ENABLE))
+ return -EOPNOTSUPP;
+
+ return qcom_scm_call(__scm->dev, &desc, &res) ?: res.result[0];
+}
+EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_enable);
+
+int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags,
+ u64 ipfn_and_s_perm_flags, u64 size_and_flags,
+ u64 ns_vmids, u64 *handle)
+{
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_SVC_MP,
+ .cmd = QCOM_SCM_MP_SHM_BRIDGE_CREATE,
+ .owner = ARM_SMCCC_OWNER_SIP,
+ .args[0] = pfn_and_ns_perm_flags,
+ .args[1] = ipfn_and_s_perm_flags,
+ .args[2] = size_and_flags,
+ .args[3] = ns_vmids,
+ .arginfo = QCOM_SCM_ARGS(4, QCOM_SCM_VAL, QCOM_SCM_VAL,
+ QCOM_SCM_VAL, QCOM_SCM_VAL),
+ };
+
+ struct qcom_scm_res res;
+ int ret;
+
+ ret = qcom_scm_call(__scm->dev, &desc, &res);
+
+ if (handle && !ret)
+ *handle = res.result[1];
+
+ return ret ?: res.result[0];
+}
+EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_create);
+
+int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle)
+{
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_SVC_MP,
+ .cmd = QCOM_SCM_MP_SHM_BRIDGE_DELETE,
+ .owner = ARM_SMCCC_OWNER_SIP,
+ .args[0] = handle,
+ .arginfo = QCOM_SCM_ARGS(1, QCOM_SCM_VAL),
+ };
+
+ return qcom_scm_call(__scm->dev, &desc, NULL);
+}
+EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_delete);
+
int qcom_scm_lmh_profile_change(u32 profile_id)
{
struct qcom_scm_desc desc = {
diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_scm.h
index aa7d06939f8e..cb7273aa0a5e 100644
--- a/drivers/firmware/qcom/qcom_scm.h
+++ b/drivers/firmware/qcom/qcom_scm.h
@@ -116,6 +116,9 @@ struct qcom_tzmem_pool *qcom_scm_get_tzmem_pool(void);
#define QCOM_SCM_MP_IOMMU_SET_CP_POOL_SIZE 0x05
#define QCOM_SCM_MP_VIDEO_VAR 0x08
#define QCOM_SCM_MP_ASSIGN 0x16
+#define QCOM_SCM_MP_SHM_BRIDGE_ENABLE 0x1c
+#define QCOM_SCM_MP_SHM_BRIDGE_DELETE 0x1d
+#define QCOM_SCM_MP_SHM_BRIDGE_CREATE 0x1e
#define QCOM_SCM_SVC_OCMEM 0x0f
#define QCOM_SCM_OCMEM_LOCK_CMD 0x01
diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
index 2c51987fb70a..767bffe20766 100644
--- a/include/linux/firmware/qcom/qcom_scm.h
+++ b/include/linux/firmware/qcom/qcom_scm.h
@@ -115,6 +115,12 @@ int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
int qcom_scm_lmh_profile_change(u32 profile_id);
bool qcom_scm_lmh_dcvsh_available(void);
+int qcom_scm_shm_bridge_enable(void);
+int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags,
+ u64 ipfn_and_s_perm_flags, u64 size_and_flags,
+ u64 ns_vmids, u64 *handle);
+int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle);
+
#ifdef CONFIG_QCOM_QSEECOM
int qcom_scm_qseecom_app_get_id(const char *app_name, u32 *app_id);
--
2.43.0
next prev parent reply other threads:[~2024-05-27 12:56 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-27 12:54 [PATCH v10 00/15] firmware: qcom: implement support for and enable SHM bridge Bartosz Golaszewski
2024-05-27 12:54 ` [PATCH v10 01/15] dt-bindings: firmware: qcom,scm: add memory-region for sa8775p Bartosz Golaszewski
2024-05-27 18:41 ` Krzysztof Kozlowski
2024-05-27 12:54 ` [PATCH v10 02/15] firmware: qcom: add a dedicated TrustZone buffer allocator Bartosz Golaszewski
2024-05-27 12:54 ` [PATCH v10 03/15] firmware: qcom: scm: enable the TZ mem allocator Bartosz Golaszewski
2024-05-27 12:54 ` [PATCH v10 04/15] firmware: qcom: scm: smc: switch to using the SCM allocator Bartosz Golaszewski
2024-05-27 12:54 ` [PATCH v10 05/15] firmware: qcom: scm: make qcom_scm_assign_mem() use the TZ allocator Bartosz Golaszewski
2024-05-27 12:54 ` [PATCH v10 06/15] firmware: qcom: scm: make qcom_scm_ice_set_key() " Bartosz Golaszewski
2024-05-27 12:54 ` [PATCH v10 07/15] firmware: qcom: scm: make qcom_scm_lmh_dcvsh() " Bartosz Golaszewski
2024-05-27 12:54 ` [PATCH v10 08/15] firmware: qcom: scm: make qcom_scm_qseecom_app_get_id() " Bartosz Golaszewski
2024-05-27 12:54 ` [PATCH v10 09/15] firmware: qcom: qseecom: convert to using " Bartosz Golaszewski
2024-06-20 23:14 ` Elliot Berman
2024-06-21 1:24 ` Amirreza Zarrabi
2024-05-27 12:55 ` Bartosz Golaszewski [this message]
2024-05-27 12:55 ` [PATCH v10 11/15] firmware: qcom: tzmem: enable SHM Bridge support Bartosz Golaszewski
2024-05-27 12:55 ` [PATCH v10 12/15] firmware: qcom: scm: add support for SHM bridge memory carveout Bartosz Golaszewski
2024-06-20 23:05 ` Elliot Berman
2024-05-27 12:55 ` [PATCH v10 13/15] firmware: qcom: scm: clarify the comment in qcom_scm_pas_init_image() Bartosz Golaszewski
2024-06-20 22:54 ` Elliot Berman
2024-06-21 13:42 ` Bartosz Golaszewski
2024-05-27 12:55 ` [PATCH v10 14/15] arm64: defconfig: enable SHM Bridge support for the TZ memory allocator Bartosz Golaszewski
2024-05-27 12:55 ` [PATCH v10 15/15] arm64: dts: qcom: sa8775p: add a dedicated memory carveout for TZ Bartosz Golaszewski
2024-05-29 14:26 ` Konrad Dybcio
2024-05-29 14:39 ` Bartosz Golaszewski
2024-05-31 12:40 ` Konrad Dybcio
2024-06-17 19:57 ` [PATCH v10 00/15] firmware: qcom: implement support for and enable SHM bridge Bartosz Golaszewski
2024-06-23 22:09 ` (subset) " Bjorn Andersson
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