From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org
Cc: "Conor Dooley" <conor.dooley@microchip.com>,
"Daire McNamara" <daire.mcnamara@microchip.com>,
"Jamie Gibbons" <jamie.gibbons@microchip.com>,
"Valentina Fernandez" <valentina.fernandezalanis@microchip.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v1 5/5] riscv: dts: microchip: add an initial devicetree for the BeagleV Fire
Date: Tue, 28 May 2024 12:57:53 +0100 [thread overview]
Message-ID: <20240528-movable-chlorine-cc5ebabb8abf@spud> (raw)
In-Reply-To: <20240327-hurry-escapable-e3212bf3cdd8@spud>
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On Wed, Mar 27, 2024 at 12:24:40PM +0000, Conor Dooley wrote:
> + fabric-pcie-bus@3000000000 {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>,
> + <0x30 0x0 0x30 0x0 0x10 0x0>;
> +
> + pcie: pcie@3000000000 {
> + compatible = "microchip,pcie-host-1.0";
> + #address-cells = <0x3>;
> + #interrupt-cells = <0x1>;
> + #size-cells = <0x2>;
> + device_type = "pci";
> + reg = <0x30 0x0 0x0 0x8000000>,
> + <0x0 0x43000000 0x0 0x10000>;
So this ain't right, I sent some patches yesterday to sort out accessing
instance 2:
https://lore.kernel.org/all/20240527-slather-backfire-db4605ae7cd7@wendy/
> + reg-names = "cfg", "apb";
> + bus-range = <0x0 0x7f>;
> + interrupt-parent = <&plic>;
> + interrupts = <119>;
> + interrupt-map = <0 0 0 1 &pcie_intc 0>,
> + <0 0 0 2 &pcie_intc 1>,
> + <0 0 0 3 &pcie_intc 2>,
> + <0 0 0 4 &pcie_intc 3>;
> + interrupt-map-mask = <0 0 0 7>;
> + clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>,
> + <&ccc_nw CLK_CCC_PLL0_OUT3>;
> + clock-names = "fic1", "fic3";
> + ranges = <0x43000000 0x0 0x9000000 0x30 0x9000000 0x0 0xf000000>,
> + <0x1000000 0x0 0x8000000 0x30 0x8000000 0x0 0x1000000>,
> + <0x3000000 0x0 0x18000000 0x30 0x18000000 0x0 0x70000000>;
> + msi-parent = <&pcie>;
> + msi-controller;
> + status = "disabled";
> +
> + pcie_intc: interrupt-controller {
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + };
> + };
> + };
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next prev parent reply other threads:[~2024-05-28 11:57 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-27 12:24 [PATCH v1 0/5] BeagleV Fire support Conor Dooley
2024-03-27 12:24 ` [PATCH v1 1/5] dt-bindings: riscv: microchip: document beaglev-fire Conor Dooley
2024-03-27 17:56 ` Rob Herring
2024-03-27 12:24 ` [PATCH v1 2/5] dt-bindings: gpio: mpfs: add coreGPIO support Conor Dooley
2024-03-27 17:57 ` Rob Herring
2024-03-29 10:28 ` Bartosz Golaszewski
2024-03-27 12:24 ` [PATCH v1 3/5] dt-bindings: gpio: mpfs: allow gpio-line-names Conor Dooley
2024-03-27 17:57 ` Rob Herring
2024-03-29 10:29 ` Bartosz Golaszewski
2024-03-27 12:24 ` [PATCH v1 4/5] dt-bindings: PCI: microchip: increase number of items in ranges property Conor Dooley
2024-03-27 17:57 ` Rob Herring
2024-04-19 15:57 ` Conor Dooley
2024-03-27 12:24 ` [PATCH v1 5/5] riscv: dts: microchip: add an initial devicetree for the BeagleV Fire Conor Dooley
2024-05-28 11:57 ` Conor Dooley [this message]
2024-05-22 23:32 ` [PATCH v1 0/5] BeagleV Fire support patchwork-bot+linux-riscv
2024-06-19 11:24 ` (subset) " Conor Dooley
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