Re: [PATCH 5/5] arm64: dts: allwinner: h616: add IOMMU node

[Andre Przywara <andre.przywara@arm.com>]

On Fri, 31 May 2024 09:42:36 +0100
Robin Murphy <robin.murphy@arm.com> wrote:

Hi Robin,

> On 2024-05-31 12:38 am, Andre Przywara wrote:
> > The Allwinner H616 contains a scatter-gather IOMMU connected to some
> > video related devices. It's almost compatible to the one used in the H6,
> > though with minor incompatibilities.
> > 
> > Add the DT node describing its resources, so that devices like the video
> > or display engine can connect to it.  
> 
> Without also describing those connections, though, having this node 
> enabled in the DT means the driver will just bind, block DMA, and 
> prevent those devices from working. That's probably not what you want.

The IOMMU manages the Display Engine (DE), the Deinterlacer (DI), the
video engine (VE) and the 2D acceleration engine (G2D).
None of those devices are supported for the H616 in mainline yet, but there
are patches out there for the DE and VE, at least. Especially the video
codecs benefit from scatter-gather, so with this patch they can make use
of it from day one.

I agree that the series on its own is not very useful, but there are quite
some H616 patches in flight out there, so this is an attempt to clean those
up, picking the low hanging fruits first ;-)

Cheers,
Andre

> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >   arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 +++++++++
> >   1 file changed, 9 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> > index 9c1980e24cb21..44f04619a43ac 100644
> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> > @@ -320,6 +320,15 @@ x32clk_fanout_pin: x32clk-fanout-pin {
> >   			};
> >   		};
> >   
> > +		iommu: iommu@30f0000 {
> > +			compatible = "allwinner,sun50i-h616-iommu";
> > +			reg = <0x030f0000 0x10000>;
> > +			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&ccu CLK_BUS_IOMMU>;
> > +			resets = <&ccu RST_BUS_IOMMU>;
> > +			#iommu-cells = <1>;
> > +		};
> > +
> >   		gic: interrupt-controller@3021000 {
> >   			compatible = "arm,gic-400";
> >   			reg = <0x03021000 0x1000>,  
>