Re: [PATCH 5/5] dt-bindings: pwm: sun20i: Add options to select a clock source and DIV_M

Krzysztof Kozlowski
2024-05-31T14:43:40Z

On 31/05/2024 16:11, Hironori KIKUCHI wrote:
> This patch adds new options to select a clock source and DIV_M register
> value for each coupled PWM channels.

Please do not use "This commit/patch/change", but imperative mood. See
longer explanation here:
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95

Bindings are before their users. This should not be last patch, because
this implies there is no user.

This applies to all variants? Or the one you add? Confused...

>
> Signed-off-by: Hironori KIKUCHI <kikuchan98@gmail.com>
> ---
> .../bindings/pwm/allwinner,sun20i-pwm.yaml | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml b/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml
> index b9b6d7e7c87..436a1d344ab 100644
> --- a/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml
> +++ b/Documentation/devicetree/bindings/pwm/allwinner,sun20i-pwm.yaml
> @@ -45,6 +45,25 @@ properties:
> description: The number of PWM channels configured for this instance
> enum: [6, 9]
>
> + allwinner,pwm-pair-clock-sources:
> + description: The clock source names for each PWM pair
> + items:
> + enum: [hosc, apb]
> + minItems: 1
> + maxItems: 8

Missing type... and add 8 of such items to your example to make it complete.

> +
> + allwinner,pwm-pair-clock-prescales:
> + description: The prescale (DIV_M register) values for each PWM pair
> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> + items:
> + items:
> + minimum: 0
> + maximum: 8
> + minItems: 1
> + maxItems: 1
> + minItems: 1
> + maxItems: 8

This does not look like matrix but array.

Why clock DIV cannot be deduced from typical PWM attributes + clock
frequency?

Best regards,
Krzysztof