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From: Jung Daehwan <dh10.jung@samsung.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
	Mathias Nyman <mathias.nyman@intel.com>,
	Felipe Balbi <balbi@kernel.org>,
	"open list:USB SUBSYSTEM" <linux-usb@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 3/5] dt-bindings: usb: xhci: Add 'write-64-hi-lo-quirk' quirk
Date: Mon, 3 Jun 2024 17:25:38 +0900	[thread overview]
Message-ID: <20240603082538.GD23593@ubuntu> (raw)
In-Reply-To: <69c954ce-d7a2-420c-b3f6-72caee02d84f@kernel.org>

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On Mon, Jun 03, 2024 at 08:58:10AM +0200, Krzysztof Kozlowski wrote:
> On 03/06/2024 05:34, Jung Daehwan wrote:
> > On Fri, May 31, 2024 at 10:12:03AM +0200, Krzysztof Kozlowski wrote:
> >> On 31/05/2024 08:07, Daehwan Jung wrote:
> >>> xHCI specification 5.1 "Register Conventions" states that 64 bit
> >>> registers should be written in low-high order. All writing operations
> >>> in xhci is done low-high order following the spec.
> >>
> >> What is high-low / low-high order? Are you talking about endianness?
> >>
> > 
> > It's not about endianness. It means 64 bit is written by 2 of 32 bit.
> > It's when low-high / high-low order is needed.
> > 
> >>>
> >>> Add a new quirk to support workaround for high-low order.
> >>
> >> Why? If they should be written low-high, then why breaking the spec? Why
> >> this cannot be deduced from compatible?
> >>
> > 
> > This quirk is for the controller that has a limitation in supporting
> > separate ERSTBA_HI and ERSTBA_LO programming.
> > 
> > I've copied below from other reply to tell why this is needed.
> > 
> > I've found out the limitation of Synopsys dwc3 controller. This can work
> > on Host mode using xHCI. A Register related to ERST should be written
> > high-low order not low-high order. Registers are always written low-high order
> > following xHCI spec.(64-bit written is done in each 2 of 32-bit)
> > That's why new quirk is needed for workaround. This quirk is used not in
> > dwc3 controller itself, but passed to xhci quirk eventually. That's because
> > this issue occurs in Host mode using xHCI.
> > 
> >> Which *upstream* hardware is affected?
> >>
> > 
> > dwc3 and xhci are affected.
> 
> Which upstream controllers or SoCs are affected. You did not post any
> user of this.
> 

This issue is not specific on SoC side but dwc3 controller. I think it's
better to add it to dwc3 directly but I can't find dts for dwc3. Dts for
SoC, which uses dwc3 would be needed in this case, right?

Best Regards,
Jung Daehwan

> Best regards,
> Krzysztof
> 
> 

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  reply	other threads:[~2024-06-03  8:25 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20240531060711epcas2p4ee3987a647f6a49b589b783d14ea25ae@epcas2p4.samsung.com>
2024-05-31  6:07 ` [PATCH v2 0/5] usb: Add quirk for writing high-low order Daehwan Jung
     [not found]   ` <CGME20240531060728epcas2p358edd115ee217a50712f1ca3b3b22bd7@epcas2p3.samsung.com>
2024-05-31  6:07     ` [PATCH v2 1/5] dt-bindings: usb: snps,dwc3: Add 'snps,xhci-write-64-hi-lo-quirk' quirk Daehwan Jung
2024-05-31  8:10       ` Krzysztof Kozlowski
2024-06-03  3:03         ` Jung Daehwan
2024-06-03  6:57           ` Krzysztof Kozlowski
2024-06-03  8:36             ` Jung Daehwan
2024-06-04  6:19               ` Krzysztof Kozlowski
     [not found]   ` <CGME20240531060729epcas2p2d895a441b017f1797b1bc1e2558d9e1b@epcas2p2.samsung.com>
2024-05-31  6:07     ` [PATCH v2 2/5] usb: dwc3: Support quirk for writing high-low order Daehwan Jung
2024-06-04  0:16       ` Thinh Nguyen
2024-06-04  1:59         ` Jung Daehwan
     [not found]   ` <CGME20240531060729epcas2p1df12dd3b14c5fa2fa0716f72010b3dbd@epcas2p1.samsung.com>
2024-05-31  6:07     ` [PATCH v2 3/5] dt-bindings: usb: xhci: Add 'write-64-hi-lo-quirk' quirk Daehwan Jung
2024-05-31  8:12       ` Krzysztof Kozlowski
2024-06-03  3:34         ` Jung Daehwan
2024-06-03  6:58           ` Krzysztof Kozlowski
2024-06-03  8:25             ` Jung Daehwan [this message]
2024-06-04  0:30               ` Thinh Nguyen
2024-06-04  2:19                 ` Jung Daehwan
     [not found]   ` <CGME20240531060731epcas2p4d4cb51e9bb30bab4195d2d12567b1391@epcas2p4.samsung.com>
2024-05-31  6:07     ` [PATCH v2 4/5] xhci: Add a quirk for writing ERST in high-low order Daehwan Jung
     [not found]   ` <CGME20240531060731epcas2p4f14afae9f00a7e71e6bd3863f0a51441@epcas2p4.samsung.com>
2024-05-31  6:07     ` [PATCH v2 5/5] usb: host: xhci-plat: Add support for XHCI_WRITE_64_HI_LO_QUIRK Daehwan Jung
2024-05-31  8:12       ` Krzysztof Kozlowski
2024-06-03  3:44         ` Jung Daehwan
2024-06-03  6:56           ` Krzysztof Kozlowski
2024-06-03  8:51             ` Jung Daehwan
2024-06-04  6:20               ` Krzysztof Kozlowski
2024-06-05  1:50                 ` Jung Daehwan
2024-06-05  6:44                   ` Krzysztof Kozlowski

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