From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Conor Dooley" <conor+dt@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
devicetree@vger.kernel.org, linux-serial@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC
Date: Tue, 4 Jun 2024 17:54:25 +0100 [thread overview]
Message-ID: <20240604-sagging-unbiased-17083b875576@spud> (raw)
In-Reply-To: <20240604084729.57239-2-hal.feng@starfivetech.com>
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On Tue, Jun 04, 2024 at 04:47:27PM +0800, Hal Feng wrote:
> The UART of StarFive JH7110 has two reset signals.
> Both of them are necessary for JH7110 to initialize UART.
>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
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next prev parent reply other threads:[~2024-06-04 16:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-04 8:47 [PATCH v2 0/3] Add the core reset for UARTs of StarFive JH7110 Hal Feng
2024-06-04 8:47 ` [PATCH v2 1/3] dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC Hal Feng
2024-06-04 16:54 ` Conor Dooley [this message]
2024-06-04 8:47 ` [PATCH v2 2/3] serial: 8250_dw: Use reset array API to get resets Hal Feng
2024-06-04 8:47 ` [PATCH v2 3/3] riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible for uarts Hal Feng
2024-07-23 12:58 ` [PATCH v2 0/3] Add the core reset for UARTs of StarFive JH7110 patchwork-bot+linux-riscv
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